Lines Matching refs:OpcodeIndex
1761 unsigned OpcodeIndex; in SelectVLD() local
1765 case MVT::v8i8: OpcodeIndex = 0; break; in SelectVLD()
1767 case MVT::v4i16: OpcodeIndex = 1; break; in SelectVLD()
1769 case MVT::v2i32: OpcodeIndex = 2; break; in SelectVLD()
1770 case MVT::v1i64: OpcodeIndex = 3; break; in SelectVLD()
1772 case MVT::v16i8: OpcodeIndex = 0; break; in SelectVLD()
1774 case MVT::v8i16: OpcodeIndex = 1; break; in SelectVLD()
1776 case MVT::v4i32: OpcodeIndex = 2; break; in SelectVLD()
1778 case MVT::v2i64: OpcodeIndex = 3; break; in SelectVLD()
1803 unsigned Opc = (is64BitVector ? DOpcodes[OpcodeIndex] : in SelectVLD()
1804 QOpcodes0[OpcodeIndex]); in SelectVLD()
1836 SDNode *VLdA = CurDAG->getMachineNode(QOpcodes0[OpcodeIndex], dl, in SelectVLD()
1854 VLd = CurDAG->getMachineNode(QOpcodes1[OpcodeIndex], dl, ResTys, Ops); in SelectVLD()
1903 unsigned OpcodeIndex; in SelectVST() local
1907 case MVT::v8i8: OpcodeIndex = 0; break; in SelectVST()
1909 case MVT::v4i16: OpcodeIndex = 1; break; in SelectVST()
1911 case MVT::v2i32: OpcodeIndex = 2; break; in SelectVST()
1912 case MVT::v1i64: OpcodeIndex = 3; break; in SelectVST()
1914 case MVT::v16i8: OpcodeIndex = 0; break; in SelectVST()
1916 case MVT::v8i16: OpcodeIndex = 1; break; in SelectVST()
1918 case MVT::v4i32: OpcodeIndex = 2; break; in SelectVST()
1920 case MVT::v2i64: OpcodeIndex = 3; break; in SelectVST()
1959 unsigned Opc = (is64BitVector ? DOpcodes[OpcodeIndex] : in SelectVST()
1960 QOpcodes0[OpcodeIndex]); in SelectVST()
2006 SDNode *VStA = CurDAG->getMachineNode(QOpcodes0[OpcodeIndex], dl, in SelectVST()
2026 SDNode *VStB = CurDAG->getMachineNode(QOpcodes1[OpcodeIndex], dl, ResTys, in SelectVST()
2070 unsigned OpcodeIndex; in SelectVLDSTLane() local
2074 case MVT::v8i8: OpcodeIndex = 0; break; in SelectVLDSTLane()
2075 case MVT::v4i16: OpcodeIndex = 1; break; in SelectVLDSTLane()
2077 case MVT::v2i32: OpcodeIndex = 2; break; in SelectVLDSTLane()
2079 case MVT::v8i16: OpcodeIndex = 0; break; in SelectVLDSTLane()
2081 case MVT::v4i32: OpcodeIndex = 1; break; in SelectVLDSTLane()
2133 unsigned Opc = (is64BitVector ? DOpcodes[OpcodeIndex] : in SelectVLDSTLane()
2134 QOpcodes[OpcodeIndex]); in SelectVLDSTLane()
2189 unsigned OpcodeIndex; in SelectVLDDup() local
2193 case MVT::v16i8: OpcodeIndex = 0; break; in SelectVLDDup()
2195 case MVT::v8i16: OpcodeIndex = 1; break; in SelectVLDDup()
2199 case MVT::v4i32: OpcodeIndex = 2; break; in SelectVLDDup()
2201 case MVT::v1i64: OpcodeIndex = 3; break; in SelectVLDDup()
2223 unsigned Opc = is64BitVector ? DOpcodes[OpcodeIndex] : in SelectVLDDup()
2224 QOpcodes0[OpcodeIndex]; in SelectVLDDup()
2245 SDNode *VLdA = CurDAG->getMachineNode(QOpcodes0[OpcodeIndex], in SelectVLDDup()
2250 VLdDup = CurDAG->getMachineNode(QOpcodes1[OpcodeIndex], dl, ResTys, OpsB); in SelectVLDDup()
2255 SDNode *VLdA = CurDAG->getMachineNode(QOpcodes0[OpcodeIndex], in SelectVLDDup()
2261 VLdDup = CurDAG->getMachineNode(QOpcodes1[OpcodeIndex], dl, ResTys, OpsB); in SelectVLDDup()