307   unsigned ResultReg = createResultReg(RC);  in fastEmitInst_r()
330   unsigned ResultReg = createResultReg(RC);  in fastEmitInst_rr()
358   unsigned ResultReg = createResultReg(RC);  in fastEmitInst_ri()
383   unsigned ResultReg = createResultReg(RC);  in fastEmitInst_i()
404   unsigned MoveReg = createResultReg(TLI.getRegClassFor(VT));  in ARMMoveToFPReg()
414   unsigned MoveReg = createResultReg(TLI.getRegClassFor(VT));  in ARMMoveToIntReg()
440     unsigned DestReg = createResultReg(TLI.getRegClassFor(VT));  in ARMMaterializeFP()
456   unsigned DestReg = createResultReg(TLI.getRegClassFor(VT));  in ARMMaterializeFP()
478     unsigned ImmReg = createResultReg(RC);  in ARMMaterializeInt()
494       unsigned ImmReg = createResultReg(RC);  in ARMMaterializeInt()
520   ResultReg = createResultReg(TLI.getRegClassFor(VT));  in ARMMaterializeInt()
551   unsigned DestReg = createResultReg(RC);  in ARMMaterializeGV()
613         unsigned NewDestReg = createResultReg(TLI.getRegClassFor(VT));  in ARMMaterializeGV()
627     unsigned NewDestReg = createResultReg(TLI.getRegClassFor(VT));  in ARMMaterializeGV()
679     unsigned ResultReg = createResultReg(RC);  in fastMaterializeAlloca()
854     unsigned ResultReg = createResultReg(RC);  in ARMSimplifyAddress()
1003     ResultReg = createResultReg(RC);  in ARMEmitLoad()
1012     unsigned MoveReg = createResultReg(TLI.getRegClassFor(MVT::f32));  in ARMEmitLoad()
1065       unsigned Res = createResultReg(isThumb2 ? &ARM::tGPRRegClass  in ARMEmitStore()
1116         unsigned MoveReg = createResultReg(TLI.getRegClassFor(MVT::i32));  in ARMEmitStore()
1498   unsigned DestReg = createResultReg(RC);  in SelectCmp()
1521   unsigned Result = createResultReg(&ARM::DPRRegClass);  in SelectFPExt()
1540   unsigned Result = createResultReg(&ARM::SPRRegClass);  in SelectFPTrunc()
1586   unsigned ResultReg = createResultReg(TLI.getRegClassFor(DstVT));  in SelectIToFP()
1613   unsigned ResultReg = createResultReg(TLI.getRegClassFor(MVT::f32));  in SelectFPToI()
1679   unsigned ResultReg = createResultReg(RC);  in SelectSelect()
1790   unsigned ResultReg = createResultReg(&ARM::GPRnopcRegClass);  in SelectBinaryIntOp()
1839   unsigned ResultReg = createResultReg(TLI.getRegClassFor(VT.SimpleTy));  in SelectBinaryFPOp()
2064       unsigned ResultReg = createResultReg(DstRC);  in FinishCall()
2085       unsigned ResultReg = createResultReg(DstRC);  in FinishCall()
2521       DestReg = createResultReg(RC);  in SelectIntrinsicCall()
2726     ResultReg = createResultReg(RC);  in ARMEmitIntExt()
2810   unsigned ResultReg = createResultReg(&ARM::GPRnopcRegClass);  in SelectShift()
2989   unsigned DestReg = createResultReg(TLI.getRegClassFor(VT));  in ARMLowerPICELF()
3001     unsigned NewDestReg = createResultReg(TLI.getRegClassFor(VT));  in ARMLowerPICELF()
3074     unsigned ResultReg = createResultReg(RC);  in fastLowerArguments()