Lines Matching refs:TableEntry

474   const NEONLdStTableEntry *TableEntry = LookupNEONLdSt(MI.getOpcode());  in ExpandVLD()  local
475 assert(TableEntry && TableEntry->IsLoad && "NEONLdStTable lookup failed"); in ExpandVLD()
476 NEONRegSpacing RegSpc = (NEONRegSpacing)TableEntry->RegSpacing; in ExpandVLD()
477 unsigned NumRegs = TableEntry->NumRegs; in ExpandVLD()
480 TII->get(TableEntry->RealOpc)); in ExpandVLD()
485 if(TableEntry->RealOpc == ARM::VLD2DUPd8x2 || in ExpandVLD()
486 TableEntry->RealOpc == ARM::VLD2DUPd16x2 || in ExpandVLD()
487 TableEntry->RealOpc == ARM::VLD2DUPd32x2) { in ExpandVLD()
503 if (NumRegs > 1 && TableEntry->copyAllListRegs) in ExpandVLD()
505 if (NumRegs > 2 && TableEntry->copyAllListRegs) in ExpandVLD()
507 if (NumRegs > 3 && TableEntry->copyAllListRegs) in ExpandVLD()
511 if (TableEntry->isUpdating) in ExpandVLD()
519 if (TableEntry->hasWritebackOperand) { in ExpandVLD()
528 if (TableEntry->RealOpc == ARM::VLD1d8Qwb_fixed || in ExpandVLD()
529 TableEntry->RealOpc == ARM::VLD1d16Qwb_fixed || in ExpandVLD()
530 TableEntry->RealOpc == ARM::VLD1d32Qwb_fixed || in ExpandVLD()
531 TableEntry->RealOpc == ARM::VLD1d64Qwb_fixed || in ExpandVLD()
532 TableEntry->RealOpc == ARM::VLD1d8Twb_fixed || in ExpandVLD()
533 TableEntry->RealOpc == ARM::VLD1d16Twb_fixed || in ExpandVLD()
534 TableEntry->RealOpc == ARM::VLD1d32Twb_fixed || in ExpandVLD()
535 TableEntry->RealOpc == ARM::VLD1d64Twb_fixed) { in ExpandVLD()
548 if(TableEntry->RealOpc != ARM::VLD2DUPd8x2 && in ExpandVLD()
549 TableEntry->RealOpc != ARM::VLD2DUPd16x2 && in ExpandVLD()
550 TableEntry->RealOpc != ARM::VLD2DUPd32x2) { in ExpandVLD()
584 const NEONLdStTableEntry *TableEntry = LookupNEONLdSt(MI.getOpcode()); in ExpandVST() local
585 assert(TableEntry && !TableEntry->IsLoad && "NEONLdStTable lookup failed"); in ExpandVST()
586 NEONRegSpacing RegSpc = (NEONRegSpacing)TableEntry->RegSpacing; in ExpandVST()
587 unsigned NumRegs = TableEntry->NumRegs; in ExpandVST()
590 TII->get(TableEntry->RealOpc)); in ExpandVST()
592 if (TableEntry->isUpdating) in ExpandVST()
599 if (TableEntry->hasWritebackOperand) { in ExpandVST()
608 if (TableEntry->RealOpc == ARM::VST1d8Qwb_fixed || in ExpandVST()
609 TableEntry->RealOpc == ARM::VST1d16Qwb_fixed || in ExpandVST()
610 TableEntry->RealOpc == ARM::VST1d32Qwb_fixed || in ExpandVST()
611 TableEntry->RealOpc == ARM::VST1d64Qwb_fixed || in ExpandVST()
612 TableEntry->RealOpc == ARM::VST1d8Twb_fixed || in ExpandVST()
613 TableEntry->RealOpc == ARM::VST1d16Twb_fixed || in ExpandVST()
614 TableEntry->RealOpc == ARM::VST1d32Twb_fixed || in ExpandVST()
615 TableEntry->RealOpc == ARM::VST1d64Twb_fixed) { in ExpandVST()
630 if (NumRegs > 1 && TableEntry->copyAllListRegs) in ExpandVST()
632 if (NumRegs > 2 && TableEntry->copyAllListRegs) in ExpandVST()
634 if (NumRegs > 3 && TableEntry->copyAllListRegs) in ExpandVST()
659 const NEONLdStTableEntry *TableEntry = LookupNEONLdSt(MI.getOpcode()); in ExpandLaneOp() local
660 assert(TableEntry && "NEONLdStTable lookup failed"); in ExpandLaneOp()
661 NEONRegSpacing RegSpc = (NEONRegSpacing)TableEntry->RegSpacing; in ExpandLaneOp()
662 unsigned NumRegs = TableEntry->NumRegs; in ExpandLaneOp()
663 unsigned RegElts = TableEntry->RegElts; in ExpandLaneOp()
666 TII->get(TableEntry->RealOpc)); in ExpandLaneOp()
683 if (TableEntry->IsLoad) { in ExpandLaneOp()
696 if (TableEntry->isUpdating) in ExpandLaneOp()
703 if (TableEntry->hasWritebackOperand) in ExpandLaneOp()
708 if (!TableEntry->IsLoad) in ExpandLaneOp()
733 if (TableEntry->IsLoad) in ExpandLaneOp()