Lines Matching refs:getDesc
150 uint64_t TSFlags = MI.getDesc().TSFlags; in convertToThreeAddress()
170 const MCInstrDesc &MCID = MI.getDesc(); in convertToThreeAddress()
670 if ((MI.getDesc().TSFlags & ARMII::DomainMask) == ARMII::DomainNEON) in isPredicable()
706 const MCInstrDesc &MCID = MI.getDesc(); in getInstSizeInBytes()
2124 BuildMI(*MI.getParent(), MI, MI.getDebugLoc(), DefMI->getDesc(), DestReg); in optimizeSelect()
2127 const MCInstrDesc &DefDesc = DefMI->getDesc(); in optimizeSelect()
2387 const MCInstrDesc &Desc = MI.getDesc(); in rewriteARMFrameIndex()
3011 const MCInstrDesc &DefMCID = DefMI.getDesc(); in FoldImmediate()
3021 const MCInstrDesc &UseMCID = UseMI.getDesc(); in FoldImmediate()
3132 const MCInstrDesc &Desc = MI.getDesc(); in getNumMicroOpsSwiftLdSt()
3430 const MCInstrDesc &Desc = MI.getDesc(); in getNumMicroOps()
3592 return MI.getNumOperands() + 1 - MI.getDesc().getNumOperands(); in getLDMVariableDefsSize()
4076 ItinData, *ResolvedDefMI, DefIdx, ResolvedDefMI->getDesc(), DefAdj, DefMO, in getOperandLatency()
4077 Reg, *ResolvedUseMI, UseIdx, ResolvedUseMI->getDesc(), UseAdj); in getOperandLatency()
4405 const MCInstrDesc &MCID = MI.getDesc(); in getPredicationCost()
4436 const MCInstrDesc &MCID = MI.getDesc(); in getInstrLatency()
4491 unsigned DDomain = DefMI.getDesc().TSFlags & ARMII::DomainMask; in hasHighOperandLatency()
4492 unsigned UDomain = UseMI.getDesc().TSFlags & ARMII::DomainMask; in hasHighOperandLatency()
4513 unsigned DDomain = DefMI.getDesc().TSFlags & ARMII::DomainMask; in hasLowDefLatency()
4515 unsigned DefClass = DefMI.getDesc().getSchedClass(); in hasLowDefLatency()
4621 unsigned Domain = MI.getDesc().TSFlags & ARMII::DomainMask; in getExecutionDomain()
4718 for (unsigned i = MI.getDesc().getNumOperands(); i; --i) in setExecutionDomain()
4737 for (unsigned i = MI.getDesc().getNumOperands(); i; --i) in setExecutionDomain()
4770 for (unsigned i = MI.getDesc().getNumOperands(); i; --i) in setExecutionDomain()
4805 for (unsigned i = MI.getDesc().getNumOperands(); i; --i) in setExecutionDomain()
4965 assert(OpNum < MI.getDesc().getNumDefs() && "OpNum is not a def"); in breakPartialRegDependency()
5018 assert(DefIdx < MI.getDesc().getNumDefs() && "Invalid definition index"); in getRegSequenceLikeInputs()
5045 assert(DefIdx < MI.getDesc().getNumDefs() && "Invalid definition index"); in getExtractSubregLikeInputs()
5068 assert(DefIdx < MI.getDesc().getNumDefs() && "Invalid definition index"); in getInsertSubregLikeInputs()