1912             unsigned PredReg = 0;  in isProfitableToIfCvt()  local
1913             ARMCC::CondCodes P = getInstrPredicate(*CmpMI, PredReg);  in isProfitableToIfCvt()
1993                                          unsigned &PredReg) {  in getInstrPredicate()  argument
1996     PredReg = 0;  in getInstrPredicate()
2000   PredReg = MI.getOperand(PIdx+1).getReg();  in getInstrPredicate()
2023     unsigned PredReg = 0;  in commuteInstructionImpl()  local
2024     ARMCC::CondCodes CC = getInstrPredicate(MI, PredReg);  in commuteInstructionImpl()
2026     if (CC == ARMCC::AL || PredReg != ARM::CPSR)  in commuteInstructionImpl()
2227                                    ARMCC::CondCodes Pred, unsigned PredReg,  in emitARMRegPlusImmediate()  argument
2233         .add(predOps(Pred, PredReg))  in emitARMRegPlusImmediate()
2257         .add(predOps(Pred, PredReg))  in emitARMRegPlusImmediate()