Lines Matching refs:Cond
161 SmallVectorImpl<MachineOperand> &Cond, in analyzeBranch() argument
190 if (!Cond.empty()) in analyzeBranch()
196 Cond.push_back(I->getOperand(1)); in analyzeBranch()
197 Cond.push_back(I->getOperand(2)); in analyzeBranch()
198 Cond.push_back(I->getOperand(3)); in analyzeBranch()
213 Cond.clear(); in analyzeBranch()
339 SmallVectorImpl<MachineOperand> &Cond) const { in reverseBranchCondition()
340 assert((Cond.size() == 3) && "Invalid ARC branch condition!"); in reverseBranchCondition()
341 Cond[2].setImm(GetOppositeBranchCondition((ARCCC::CondCode)Cond[2].getImm())); in reverseBranchCondition()
361 ArrayRef<MachineOperand> Cond, in insertBranch() argument
367 assert((Cond.size() == 3 || Cond.size() == 0) && in insertBranch()
370 if (Cond.empty()) { in insertBranch()
374 int BccOpc = Cond[1].isImm() ? ARC::BRcc_ru6_p : ARC::BRcc_rr_p; in insertBranch()
378 MIB.add(Cond[i]); in insertBranch()