Lines Matching refs:TII
70 static bool foldImmediates(MachineInstr &MI, const SIInstrInfo *TII, in foldImmediates() argument
72 assert(TII->isVOP1(MI) || TII->isVOP2(MI) || TII->isVOPC(MI)); in foldImmediates()
111 if (TII->commuteInstruction(MI)) { in foldImmediates()
112 if (foldImmediates(MI, TII, MRI, false)) in foldImmediates()
116 TII->commuteInstruction(MI); in foldImmediates()
123 static bool isKImmOperand(const SIInstrInfo *TII, const MachineOperand &Src) { in isKImmOperand() argument
125 !TII->isInlineConstant(*Src.getParent(), in isKImmOperand()
129 static bool isKUImmOperand(const SIInstrInfo *TII, const MachineOperand &Src) { in isKUImmOperand() argument
131 !TII->isInlineConstant(*Src.getParent(), in isKUImmOperand()
135 static bool isKImmOrKUImmOperand(const SIInstrInfo *TII, in isKImmOrKUImmOperand() argument
140 return !TII->isInlineConstant(Src); in isKImmOrKUImmOperand()
145 return !TII->isInlineConstant(Src); in isKImmOrKUImmOperand()
153 static bool isReverseInlineImm(const SIInstrInfo *TII, in isReverseInlineImm() argument
156 if (!isInt<32>(Src.getImm()) || TII->isInlineConstant(Src)) in isReverseInlineImm()
177 static void shrinkScalarCompare(const SIInstrInfo *TII, MachineInstr &MI) { in shrinkScalarCompare() argument
181 TII->commuteInstruction(MI, false, 0, 1); in shrinkScalarCompare()
195 if (isKImmOrKUImmOperand(TII, Src1, HasUImm)) { in shrinkScalarCompare()
201 MI.setDesc(TII->get(SOPKOpc)); in shrinkScalarCompare()
207 const MCInstrDesc &NewDesc = TII->get(SOPKOpc); in shrinkScalarCompare()
209 if ((TII->sopkIsZext(SOPKOpc) && isKUImmOperand(TII, Src1)) || in shrinkScalarCompare()
210 (!TII->sopkIsZext(SOPKOpc) && isKImmOperand(TII, Src1))) { in shrinkScalarCompare()
222 const SIInstrInfo *TII, in shrinkScalarLogicOp() argument
263 if (!TII->commuteInstruction(MI, false, 1, 2)) in shrinkScalarLogicOp()
276 MI.setDesc(TII->get(Opc)); in shrinkScalarLogicOp()
361 const SIInstrInfo *TII) { in matchSwap() argument
374 unsigned Size = TII->getOpSize(MovT, 0) / 4; in matchSwap()
376 const SIRegisterInfo &TRI = TII->getRegisterInfo(); in matchSwap()
434 TII->get(AMDGPU::V_SWAP_B32)) in matchSwap()
460 const SIInstrInfo *TII = ST.getInstrInfo(); in runOnMachineFunction() local
486 if (isReverseInlineImm(TII, Src, ReverseImm)) { in runOnMachineFunction()
487 MI.setDesc(TII->get(AMDGPU::V_BFREV_B32_e32)); in runOnMachineFunction()
496 if (auto *NextMI = matchSwap(MI, MRI, TII)) { in runOnMachineFunction()
541 if (TII->commuteInstruction(MI, false, 1, 2)) in runOnMachineFunction()
556 if (Src1->isImm() && isKImmOperand(TII, *Src1)) { in runOnMachineFunction()
560 MI.setDesc(TII->get(Opc)); in runOnMachineFunction()
567 if (MI.isCompare() && TII->isSOPC(MI)) { in runOnMachineFunction()
568 shrinkScalarCompare(TII, MI); in runOnMachineFunction()
580 if (isKImmOperand(TII, Src)) in runOnMachineFunction()
581 MI.setDesc(TII->get(AMDGPU::S_MOVK_I32)); in runOnMachineFunction()
582 else if (isReverseInlineImm(TII, Src, ReverseImm)) { in runOnMachineFunction()
583 MI.setDesc(TII->get(AMDGPU::S_BREV_B32)); in runOnMachineFunction()
595 if (shrinkScalarLogicOp(ST, MRI, TII, MI)) in runOnMachineFunction()
599 if (!TII->hasVALU32BitEncoding(MI.getOpcode())) in runOnMachineFunction()
602 if (!TII->canShrink(MI, MRI)) { in runOnMachineFunction()
605 if (!MI.isCommutable() || !TII->commuteInstruction(MI) || in runOnMachineFunction()
606 !TII->canShrink(MI, MRI)) in runOnMachineFunction()
612 if (!TII->hasVALU32BitEncoding(MI.getOpcode())) in runOnMachineFunction()
617 if (TII->isVOPC(Op32)) { in runOnMachineFunction()
639 TII->getNamedOperand(MI, AMDGPU::OpName::src2); in runOnMachineFunction()
652 const MachineOperand *SDst = TII->getNamedOperand(MI, in runOnMachineFunction()
656 const MachineOperand *Src2 = TII->getNamedOperand(MI, in runOnMachineFunction()
679 MachineInstr *Inst32 = TII->buildShrunkInst(MI, Op32); in runOnMachineFunction()
686 foldImmediates(*Inst32, TII, MRI); in runOnMachineFunction()