Lines Matching refs:TII
75 const SIInstrInfo *TII; member in __anon536d3cb50111::SIPeepholeSDWA
121 virtual MachineInstr *potentialToConvert(const SIInstrInfo *TII) = 0;
122 virtual bool convertToSDWA(MachineInstr &MI, const SIInstrInfo *TII) = 0;
154 MachineInstr *potentialToConvert(const SIInstrInfo *TII) override;
155 bool convertToSDWA(MachineInstr &MI, const SIInstrInfo *TII) override;
162 uint64_t getSrcMods(const SIInstrInfo *TII,
181 MachineInstr *potentialToConvert(const SIInstrInfo *TII) override;
182 bool convertToSDWA(MachineInstr &MI, const SIInstrInfo *TII) override;
202 bool convertToSDWA(MachineInstr &MI, const SIInstrInfo *TII) override;
335 uint64_t SDWASrcOperand::getSrcMods(const SIInstrInfo *TII, in getSrcMods() argument
339 if (TII->getNamedOperand(*MI, AMDGPU::OpName::src0) == SrcOp) { in getSrcMods()
340 if (auto *Mod = TII->getNamedOperand(*MI, AMDGPU::OpName::src0_modifiers)) { in getSrcMods()
343 } else if (TII->getNamedOperand(*MI, AMDGPU::OpName::src1) == SrcOp) { in getSrcMods()
344 if (auto *Mod = TII->getNamedOperand(*MI, AMDGPU::OpName::src1_modifiers)) { in getSrcMods()
360 MachineInstr *SDWASrcOperand::potentialToConvert(const SIInstrInfo *TII) { in potentialToConvert() argument
370 bool SDWASrcOperand::convertToSDWA(MachineInstr &MI, const SIInstrInfo *TII) { in convertToSDWA() argument
374 MachineOperand *Src = TII->getNamedOperand(MI, AMDGPU::OpName::src0); in convertToSDWA()
375 MachineOperand *SrcSel = TII->getNamedOperand(MI, AMDGPU::OpName::src0_sel); in convertToSDWA()
377 TII->getNamedOperand(MI, AMDGPU::OpName::src0_modifiers); in convertToSDWA()
381 Src = TII->getNamedOperand(MI, AMDGPU::OpName::src1); in convertToSDWA()
382 SrcSel = TII->getNamedOperand(MI, AMDGPU::OpName::src1_sel); in convertToSDWA()
383 SrcMods = TII->getNamedOperand(MI, AMDGPU::OpName::src1_modifiers); in convertToSDWA()
393 MachineOperand *Dst = TII->getNamedOperand(MI, AMDGPU::OpName::vdst); in convertToSDWA()
395 TII->getNamedOperand(MI, AMDGPU::OpName::dst_unused); in convertToSDWA()
404 TII->getNamedImmOperand(MI, AMDGPU::OpName::dst_sel)); in convertToSDWA()
436 SrcMods->setImm(getSrcMods(TII, Src)); in convertToSDWA()
442 MachineInstr *SDWADstOperand::potentialToConvert(const SIInstrInfo *TII) { in potentialToConvert() argument
461 bool SDWADstOperand::convertToSDWA(MachineInstr &MI, const SIInstrInfo *TII) { in convertToSDWA() argument
471 MachineOperand *Operand = TII->getNamedOperand(MI, AMDGPU::OpName::vdst); in convertToSDWA()
476 MachineOperand *DstSel= TII->getNamedOperand(MI, AMDGPU::OpName::dst_sel); in convertToSDWA()
479 MachineOperand *DstUnused= TII->getNamedOperand(MI, AMDGPU::OpName::dst_unused); in convertToSDWA()
490 const SIInstrInfo *TII) { in convertToSDWA() argument
516 return SDWADstOperand::convertToSDWA(MI, TII); in convertToSDWA()
532 if (!TII->isFoldableCopy(*DefInst)) in foldToImm()
564 MachineOperand *Src0 = TII->getNamedOperand(MI, AMDGPU::OpName::src0); in matchSDWAOperand()
572 MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1); in matchSDWAOperand()
573 MachineOperand *Dst = TII->getNamedOperand(MI, AMDGPU::OpName::vdst); in matchSDWAOperand()
605 MachineOperand *Src0 = TII->getNamedOperand(MI, AMDGPU::OpName::src0); in matchSDWAOperand()
610 MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1); in matchSDWAOperand()
611 MachineOperand *Dst = TII->getNamedOperand(MI, AMDGPU::OpName::vdst); in matchSDWAOperand()
645 MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1); in matchSDWAOperand()
650 MachineOperand *Src2 = TII->getNamedOperand(MI, AMDGPU::OpName::src2); in matchSDWAOperand()
674 MachineOperand *Src0 = TII->getNamedOperand(MI, AMDGPU::OpName::src0); in matchSDWAOperand()
675 MachineOperand *Dst = TII->getNamedOperand(MI, AMDGPU::OpName::vdst); in matchSDWAOperand()
691 MachineOperand *Src0 = TII->getNamedOperand(MI, AMDGPU::OpName::src0); in matchSDWAOperand()
692 MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1); in matchSDWAOperand()
704 MachineOperand *Dst = TII->getNamedOperand(MI, AMDGPU::OpName::vdst); in matchSDWAOperand()
736 if (!TII->isSDWA(*Op1Inst)) in matchSDWAOperand()
746 MachineOperand *OrSDWA = TII->getNamedOperand(MI, AMDGPU::OpName::src0); in matchSDWAOperand()
747 MachineOperand *OrOther = TII->getNamedOperand(MI, AMDGPU::OpName::src1); in matchSDWAOperand()
751 OrSDWA = TII->getNamedOperand(MI, AMDGPU::OpName::src1); in matchSDWAOperand()
752 OrOther = TII->getNamedOperand(MI, AMDGPU::OpName::src0); in matchSDWAOperand()
786 if (!TII->isSDWA(*OtherInst)) in matchSDWAOperand()
790 TII->getNamedImmOperand(*SDWAInst, AMDGPU::OpName::dst_sel));; in matchSDWAOperand()
792 TII->getNamedImmOperand(*OtherInst, AMDGPU::OpName::dst_sel)); in matchSDWAOperand()
832 TII->getNamedImmOperand(*OtherInst, AMDGPU::OpName::dst_unused)); in matchSDWAOperand()
837 MachineOperand *OrDst = TII->getNamedOperand(MI, AMDGPU::OpName::vdst); in matchSDWAOperand()
884 if (!TII->canShrink(MI, *MRI)) in pseudoOpConvertToVOP2()
888 const MachineOperand *Sdst = TII->getNamedOperand(MI, AMDGPU::OpName::sdst); in pseudoOpConvertToVOP2()
896 if (!TII->canShrink(MISucc, *MRI)) in pseudoOpConvertToVOP2()
900 MachineOperand *CarryIn = TII->getNamedOperand(MISucc, AMDGPU::OpName::src2); in pseudoOpConvertToVOP2()
903 MachineOperand *CarryOut = TII->getNamedOperand(MISucc, AMDGPU::OpName::sdst); in pseudoOpConvertToVOP2()
921 auto NewMI = BuildMI(MBB, MI, MI.getDebugLoc(), TII->get(Opc)); in pseudoOpConvertToVOP2()
922 NewMI.add(*TII->getNamedOperand(MI, AMDGPU::OpName::vdst)); in pseudoOpConvertToVOP2()
923 NewMI.add(*TII->getNamedOperand(MI, AMDGPU::OpName::src0)); in pseudoOpConvertToVOP2()
924 NewMI.add(*TII->getNamedOperand(MI, AMDGPU::OpName::src1)); in pseudoOpConvertToVOP2()
927 auto NewInst = BuildMI(MBB, MISucc, MISucc.getDebugLoc(), TII->get(SuccOpc)); in pseudoOpConvertToVOP2()
928 NewInst.add(*TII->getNamedOperand(MISucc, AMDGPU::OpName::vdst)); in pseudoOpConvertToVOP2()
929 NewInst.add(*TII->getNamedOperand(MISucc, AMDGPU::OpName::src0)); in pseudoOpConvertToVOP2()
930 NewInst.add(*TII->getNamedOperand(MISucc, AMDGPU::OpName::src1)); in pseudoOpConvertToVOP2()
938 if (TII->isSDWA(Opc)) in isConvertibleToSDWA()
948 if (!ST.hasSDWAOmod() && TII->hasModifiersSet(MI, AMDGPU::OpName::omod)) in isConvertibleToSDWA()
951 if (TII->isVOPC(Opc)) { in isConvertibleToSDWA()
953 const MachineOperand *SDst = TII->getNamedOperand(MI, AMDGPU::OpName::sdst); in isConvertibleToSDWA()
959 (TII->hasModifiersSet(MI, AMDGPU::OpName::clamp) || in isConvertibleToSDWA()
960 TII->hasModifiersSet(MI, AMDGPU::OpName::omod))) in isConvertibleToSDWA()
963 } else if (TII->getNamedOperand(MI, AMDGPU::OpName::sdst) || in isConvertibleToSDWA()
964 !TII->getNamedOperand(MI, AMDGPU::OpName::vdst)) { in isConvertibleToSDWA()
987 if (TII->isSDWA(Opcode)) { in convertToSDWA()
996 const MCInstrDesc &SDWADesc = TII->get(SDWAOpcode); in convertToSDWA()
1003 MachineOperand *Dst = TII->getNamedOperand(MI, AMDGPU::OpName::vdst); in convertToSDWA()
1007 } else if ((Dst = TII->getNamedOperand(MI, AMDGPU::OpName::sdst))) { in convertToSDWA()
1018 MachineOperand *Src0 = TII->getNamedOperand(MI, AMDGPU::OpName::src0); in convertToSDWA()
1023 if (auto *Mod = TII->getNamedOperand(MI, AMDGPU::OpName::src0_modifiers)) in convertToSDWA()
1030 MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1); in convertToSDWA()
1035 if (auto *Mod = TII->getNamedOperand(MI, AMDGPU::OpName::src1_modifiers)) in convertToSDWA()
1045 MachineOperand *Src2 = TII->getNamedOperand(MI, AMDGPU::OpName::src2); in convertToSDWA()
1052 MachineOperand *Clamp = TII->getNamedOperand(MI, AMDGPU::OpName::clamp); in convertToSDWA()
1061 MachineOperand *OMod = TII->getNamedOperand(MI, AMDGPU::OpName::omod); in convertToSDWA()
1071 MachineOperand *DstSel = TII->getNamedOperand(MI, AMDGPU::OpName::dst_sel); in convertToSDWA()
1081 MachineOperand *DstUnused = TII->getNamedOperand(MI, AMDGPU::OpName::dst_unused); in convertToSDWA()
1091 MachineOperand *Src0Sel = TII->getNamedOperand(MI, AMDGPU::OpName::src0_sel); in convertToSDWA()
1101 MachineOperand *Src1Sel = TII->getNamedOperand(MI, AMDGPU::OpName::src1_sel); in convertToSDWA()
1110 auto DstUnused = TII->getNamedOperand(MI, AMDGPU::OpName::dst_unused); in convertToSDWA()
1143 Converted |= Operand->convertToSDWA(*SDWAInst, TII); in convertToSDWA()
1163 const MCInstrDesc &Desc = TII->get(MI.getOpcode()); in legalizeScalarOperands()
1182 TII->get(AMDGPU::V_MOV_B32_e32), VGPR); in legalizeScalarOperands()
1200 TII = ST.getInstrInfo(); in runOnMachineFunction()
1214 MachineInstr *PotentialMI = Operand->potentialToConvert(TII); in runOnMachineFunction()
1227 MachineInstr *PotentialMI = Operand->potentialToConvert(TII); in runOnMachineFunction()