62   case AMDGPU::COPY:  in isCopyFromExec()
63   case AMDGPU::S_MOV_B64:  in isCopyFromExec()
64   case AMDGPU::S_MOV_B64_term: {  in isCopyFromExec()
66     if (Src.isReg() && Src.getReg() == AMDGPU::EXEC)  in isCopyFromExec()
71   return AMDGPU::NoRegister;  in isCopyFromExec()
77   case AMDGPU::COPY:  in isCopyToExec()
78   case AMDGPU::S_MOV_B64: {  in isCopyToExec()
80     if (Dst.isReg() && Dst.getReg() == AMDGPU::EXEC && MI.getOperand(1).isReg())  in isCopyToExec()
84   case AMDGPU::S_MOV_B64_term:  in isCopyToExec()
88   return AMDGPU::NoRegister;  in isCopyToExec()
95   case AMDGPU::S_AND_B64:  in isLogicalOpOnExec()
96   case AMDGPU::S_OR_B64:  in isLogicalOpOnExec()
97   case AMDGPU::S_XOR_B64:  in isLogicalOpOnExec()
98   case AMDGPU::S_ANDN2_B64:  in isLogicalOpOnExec()
99   case AMDGPU::S_ORN2_B64:  in isLogicalOpOnExec()
100   case AMDGPU::S_NAND_B64:  in isLogicalOpOnExec()
101   case AMDGPU::S_NOR_B64:  in isLogicalOpOnExec()
102   case AMDGPU::S_XNOR_B64: {  in isLogicalOpOnExec()
104     if (Src1.isReg() && Src1.getReg() == AMDGPU::EXEC)  in isLogicalOpOnExec()
107     if (Src2.isReg() && Src2.getReg() == AMDGPU::EXEC)  in isLogicalOpOnExec()
112   return AMDGPU::NoRegister;  in isLogicalOpOnExec()
117   case AMDGPU::S_AND_B64:  in getSaveExecOp()
118     return AMDGPU::S_AND_SAVEEXEC_B64;  in getSaveExecOp()
119   case AMDGPU::S_OR_B64:  in getSaveExecOp()
120     return AMDGPU::S_OR_SAVEEXEC_B64;  in getSaveExecOp()
121   case AMDGPU::S_XOR_B64:  in getSaveExecOp()
122     return AMDGPU::S_XOR_SAVEEXEC_B64;  in getSaveExecOp()
123   case AMDGPU::S_ANDN2_B64:  in getSaveExecOp()
124     return AMDGPU::S_ANDN2_SAVEEXEC_B64;  in getSaveExecOp()
125   case AMDGPU::S_ORN2_B64:  in getSaveExecOp()
126     return AMDGPU::S_ORN2_SAVEEXEC_B64;  in getSaveExecOp()
127   case AMDGPU::S_NAND_B64:  in getSaveExecOp()
128     return AMDGPU::S_NAND_SAVEEXEC_B64;  in getSaveExecOp()
129   case AMDGPU::S_NOR_B64:  in getSaveExecOp()
130     return AMDGPU::S_NOR_SAVEEXEC_B64;  in getSaveExecOp()
131   case AMDGPU::S_XNOR_B64:  in getSaveExecOp()
132     return AMDGPU::S_XNOR_SAVEEXEC_B64;  in getSaveExecOp()
134     return AMDGPU::INSTRUCTION_LIST_END;  in getSaveExecOp()
143   case AMDGPU::S_MOV_B64_term: {  in removeTerminatorBit()
144     MI.setDesc(TII.get(AMDGPU::COPY));  in removeTerminatorBit()
147   case AMDGPU::S_XOR_B64_term: {  in removeTerminatorBit()
150     MI.setDesc(TII.get(AMDGPU::S_XOR_B64));  in removeTerminatorBit()
153   case AMDGPU::S_ANDN2_B64_term: {  in removeTerminatorBit()
156     MI.setDesc(TII.get(AMDGPU::S_ANDN2_B64));  in removeTerminatorBit()
189     if (CopyFromExec != AMDGPU::NoRegister)  in findExecCopy()
234     if (CopyToExec == AMDGPU::NoRegister)  in runOnMachineFunction()
249         PrepareExecInst->getOperand(0).setReg(AMDGPU::EXEC);  in runOnMachineFunction()
272       if (SaveExecInst && J->readsRegister(AMDGPU::EXEC, TRI)) {  in runOnMachineFunction()
291         if (SaveExecOp == AMDGPU::INSTRUCTION_LIST_END)  in runOnMachineFunction()
356       OtherInst->substituteRegister(CopyToExec, AMDGPU::EXEC,  in runOnMachineFunction()
357                                     AMDGPU::NoSubRegister, *TRI);  in runOnMachineFunction()