Lines Matching refs:getRegClass
464 const TargetRegisterClass *DstRC = MRI.getRegClass(FirstDst->getReg()); in shouldClusterMemOps()
636 const TargetRegisterClass *RegClass = MRI.getRegClass(DestReg); in materializeImmediate()
699 assert(MRI.getRegClass(DstReg) == &AMDGPU::VGPR_32RegClass && in insertVectorSelect()
1822 const TargetRegisterClass *RC = MRI.getRegClass(TrueReg); in canInsertSelect()
1823 assert(MRI.getRegClass(FalseReg) == RC); in canInsertSelect()
1836 const TargetRegisterClass *RC = MRI.getRegClass(TrueReg); in canInsertSelect()
1837 assert(MRI.getRegClass(FalseReg) == RC); in canInsertSelect()
1864 const TargetRegisterClass *DstRC = MRI.getRegClass(DstReg); in insertSelect()
2052 if (!Src1->isReg() || RI.isSGPRClass(MRI->getRegClass(Src1->getReg()))) in FoldImmediate()
2055 if (!Src2->isReg() || RI.isSGPRClass(MRI->getRegClass(Src2->getReg()))) in FoldImmediate()
2112 RI.isSGPRClass(MRI->getRegClass(Src0->getReg())))) in FoldImmediate()
2128 RI.isSGPRClass(MRI->getRegClass(Src1->getReg())))) in FoldImmediate()
2719 return RI.isSGPRClass(MRI.getRegClass(MO.getReg())); in usesConstantBus()
2888 const TargetRegisterClass *RC = RI.getRegClass(RegClass); in verifyInstruction()
3269 return MRI.getRegClass(Reg); in getOpRegClass()
3274 return RI.getRegClass(RCID); in getOpRegClass()
3295 const TargetRegisterClass *RC = RI.getRegClass(RCID); in legalizeOpWithMove()
3384 MRI.getRegClass(Reg) : in isLegalRegOperand()
3400 return RI.getCommonSubClass(RC, RI.getRegClass(OpInfo.RegClass)) == RC; in isLegalRegOperand()
3420 OpInfo.RegClass != -1 ? RI.getRegClass(OpInfo.RegClass) : nullptr; in isOperandLegal()
3599 if (!RI.isSGPRClass(MRI.getRegClass(MO.getReg()))) in legalizeOperandsVOP3()
3616 const TargetRegisterClass *VRC = MRI.getRegClass(SrcReg); in readlaneVGPRToSGPR()
3655 if (SBase && !RI.isSGPRClass(MRI.getRegClass(SBase->getReg()))) { in legalizeOperandsSMRD()
3660 if (SOff && !RI.isSGPRClass(MRI.getRegClass(SOff->getReg()))) { in legalizeOperandsSMRD()
3914 MRI.getRegClass(MI.getOperand(i).getReg()); in legalizeOperands()
3966 const TargetRegisterClass *OpRC = MRI.getRegClass(Op.getReg()); in legalizeOperands()
3984 const TargetRegisterClass *DstRC = MRI.getRegClass(Dst); in legalizeOperands()
3985 const TargetRegisterClass *Src0RC = MRI.getRegClass(Src0); in legalizeOperands()
3997 if (Src.isReg() && RI.hasVGPRs(MRI.getRegClass(Src.getReg()))) in legalizeOperands()
4011 if (SRsrc && !RI.isSGPRClass(MRI.getRegClass(SRsrc->getReg()))) { in legalizeOperands()
4017 if (SSamp && !RI.isSGPRClass(MRI.getRegClass(SSamp->getReg()))) { in legalizeOperands()
4031 if (RI.getCommonSubClass(MRI.getRegClass(Rsrc->getReg()), in legalizeOperands()
4032 RI.getRegClass(RsrcRC))) { in legalizeOperands()
4525 RI.isSGPRClass(MRI.getRegClass(Src0.getReg())); in lowerScalarXnor()
4527 RI.isSGPRClass(MRI.getRegClass(Src1.getReg())); in lowerScalarXnor()
4637 MRI.getRegClass(Src0.getReg()) : in splitScalar64BitUnaryOp()
4645 const TargetRegisterClass *DestRC = MRI.getRegClass(Dest.getReg()); in splitScalar64BitUnaryOp()
4698 const TargetRegisterClass *Src0RC = MRI.getRegClass(Src0.getReg()); in splitScalar64BitAddSub()
4699 const TargetRegisterClass *Src1RC = MRI.getRegClass(Src1.getReg()); in splitScalar64BitAddSub()
4761 MRI.getRegClass(Src0.getReg()) : in splitScalar64BitBinaryOp()
4766 MRI.getRegClass(Src1.getReg()) : in splitScalar64BitBinaryOp()
4780 const TargetRegisterClass *DestRC = MRI.getRegClass(Dest.getReg()); in splitScalar64BitBinaryOp()
4823 const TargetRegisterClass *DestRC = MRI.getRegClass(Dest.getReg()); in splitScalar64BitXnor()
4865 MRI.getRegClass(Src.getReg()) : in splitScalar64BitBCNT()
5105 const TargetRegisterClass *OpRC = RI.getRegClass(Desc.OpInfo[Idx].RegClass); in findUsedSGPR()
5112 const TargetRegisterClass *RegRC = MRI.getRegClass(Reg); in findUsedSGPR()