Lines Matching refs:has16BitInsts

140   if (Subtarget->has16BitInsts()) {  in SITargetLowering()
349   if (Subtarget->has16BitInsts()) {  in SITargetLowering()
421   if (Subtarget->has16BitInsts()) {  in SITargetLowering()
640   if (Subtarget->has16BitInsts()) {  in SITargetLowering()
752     if (Size == 16 && Subtarget->has16BitInsts())  in getRegisterTypeForCallingConv()
773     if (Size == 16 && Subtarget->has16BitInsts())  in getNumRegistersForCallingConv()
805     if (Size == 16 && Subtarget->has16BitInsts()) {  in getVectorTypeBreakdownForCallingConv()
1254   if (Subtarget->has16BitInsts() && VT == MVT::i16) {  in isTypeDesirableForOp()
3565     return Subtarget->has16BitInsts() && Subtarget->hasFP16Denormals();  in isFMAFasterThanFMulAndFAdd()
7654   if (!Subtarget->has16BitInsts() ||  in performZeroExtendCombine()
8170        (VT == MVT::f16 && Subtarget->has16BitInsts()) ||  in performMinMaxCombine()
8784   if (VT != MVT::f32 && VT != MVT::f64 && (Subtarget->has16BitInsts() &&  in performSetCCCombine()