3688                                        SelectionDAG &DAG, bool Unpacked) {  in adjustLoadValueTypeImpl()  argument
3692   if (Unpacked) { // From v2i32/v4i32 back to v2f16/v4f16.  in adjustLoadValueTypeImpl()
3720   bool Unpacked = Subtarget->hasUnpackedD16VMem();  in adjustLoadValueType()  local
3724   if (Unpacked && LoadVT.isVector()) {  in adjustLoadValueType()
3738   if (!Unpacked) // Just adjusted the opcode.  in adjustLoadValueType()
3741   SDValue Adjusted = adjustLoadValueTypeImpl(Load, LoadVT, DL, DAG, Unpacked);  in adjustLoadValueType()
4673                                  bool IsTexFail, bool Unpacked, bool IsD16,  in constructRetValue()  argument
4680   EVT AdjEltVT = Unpacked && IsD16 ? MVT::i32 : ReqRetEltVT;  in constructRetValue()
4681   EVT AdjVT = Unpacked ? ReqRetNumElts > 1 ? EVT::getVectorVT(Context, AdjEltVT, ReqRetNumElts)  in constructRetValue()
4688   if (IsD16 && !Unpacked)  in constructRetValue()
4725     if (IsD16 && Unpacked)  in constructRetValue()
4726       PreTFCRes = adjustLoadValueTypeImpl(NewVec, ReqRetVT, DL, DAG, Unpacked);  in constructRetValue()