Lines Matching refs:LoopBB

2846   MachineBasicBlock &LoopBB,  in emitLoadM0FromVGPRLoop()  argument
2856 MachineBasicBlock::iterator I = LoopBB.begin(); in emitLoadM0FromVGPRLoop()
2863 BuildMI(LoopBB, I, DL, TII->get(TargetOpcode::PHI), PhiReg) in emitLoadM0FromVGPRLoop()
2867 .addMBB(&LoopBB); in emitLoadM0FromVGPRLoop()
2869 BuildMI(LoopBB, I, DL, TII->get(TargetOpcode::PHI), PhiExec) in emitLoadM0FromVGPRLoop()
2873 .addMBB(&LoopBB); in emitLoadM0FromVGPRLoop()
2876 BuildMI(LoopBB, I, DL, TII->get(AMDGPU::V_READFIRSTLANE_B32), CurrentIdxReg) in emitLoadM0FromVGPRLoop()
2880 BuildMI(LoopBB, I, DL, TII->get(AMDGPU::V_CMP_EQ_U32_e64), CondReg) in emitLoadM0FromVGPRLoop()
2885 BuildMI(LoopBB, I, DL, TII->get(AMDGPU::S_AND_SAVEEXEC_B64), NewExec) in emitLoadM0FromVGPRLoop()
2896 BuildMI(LoopBB, I, DL, TII->get(AMDGPU::S_ADD_I32), IdxReg) in emitLoadM0FromVGPRLoop()
2903 BuildMI(LoopBB, I, DL, TII->get(AMDGPU::S_SET_GPR_IDX_ON)) in emitLoadM0FromVGPRLoop()
2910 BuildMI(LoopBB, I, DL, TII->get(AMDGPU::S_MOV_B32), AMDGPU::M0) in emitLoadM0FromVGPRLoop()
2913 BuildMI(LoopBB, I, DL, TII->get(AMDGPU::S_ADD_I32), AMDGPU::M0) in emitLoadM0FromVGPRLoop()
2921 BuildMI(LoopBB, I, DL, TII->get(AMDGPU::S_XOR_B64), AMDGPU::EXEC) in emitLoadM0FromVGPRLoop()
2929 BuildMI(LoopBB, I, DL, TII->get(AMDGPU::S_CBRANCH_EXECNZ)) in emitLoadM0FromVGPRLoop()
2930 .addMBB(&LoopBB); in emitLoadM0FromVGPRLoop()
2965 MachineBasicBlock *LoopBB = MF->CreateMachineBasicBlock(); in loadM0FromVGPR() local
2970 MF->insert(MBBI, LoopBB); in loadM0FromVGPR()
2973 LoopBB->addSuccessor(LoopBB); in loadM0FromVGPR()
2974 LoopBB->addSuccessor(RemainderBB); in loadM0FromVGPR()
2980 MBB.addSuccessor(LoopBB); in loadM0FromVGPR()
2984 auto InsPt = emitLoadM0FromVGPRLoop(TII, MRI, MBB, *LoopBB, DL, *Idx, in loadM0FromVGPR()
3123 MachineBasicBlock *LoopBB = InsPt->getParent(); in emitIndirectSrc() local
3126 BuildMI(*LoopBB, InsPt, DL, TII->get(AMDGPU::V_MOV_B32_e32), Dst) in emitIndirectSrc()
3130 BuildMI(*LoopBB, InsPt, DL, TII->get(AMDGPU::S_SET_GPR_IDX_OFF)); in emitIndirectSrc()
3132 BuildMI(*LoopBB, InsPt, DL, TII->get(AMDGPU::V_MOVRELS_B32_e32), Dst) in emitIndirectSrc()
3139 return LoopBB; in emitIndirectSrc()
3235 MachineBasicBlock *LoopBB = InsPt->getParent(); in emitIndirectDst() local
3238 BuildMI(*LoopBB, InsPt, DL, TII->get(AMDGPU::V_MOV_B32_indirect)) in emitIndirectDst()
3244 BuildMI(*LoopBB, InsPt, DL, TII->get(AMDGPU::S_SET_GPR_IDX_OFF)); in emitIndirectDst()
3248 BuildMI(*LoopBB, InsPt, DL, MovRelDesc) in emitIndirectDst()
3257 return LoopBB; in emitIndirectDst()