Lines Matching refs:INSERT_VECTOR_ELT
260 case ISD::INSERT_VECTOR_ELT: in SITargetLowering()
289 setOperationAction(ISD::INSERT_VECTOR_ELT, Vec64, Promote); in SITargetLowering()
290 AddPromotedToType(ISD::INSERT_VECTOR_ELT, Vec64, MVT::v4i32); in SITargetLowering()
306 setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v2i16, Custom); in SITargetLowering()
307 setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v2f16, Custom); in SITargetLowering()
308 setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v4i16, Custom); in SITargetLowering()
309 setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v4f16, Custom); in SITargetLowering()
317 setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v2i8, Custom); in SITargetLowering()
318 setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v4i8, Custom); in SITargetLowering()
319 setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v8i8, Custom); in SITargetLowering()
323 setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v4i16, Custom); in SITargetLowering()
324 setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v4f16, Custom); in SITargetLowering()
506 case ISD::INSERT_VECTOR_ELT: in SITargetLowering()
683 setTargetDAGCombine(ISD::INSERT_VECTOR_ELT); in SITargetLowering()
3648 case ISD::INSERT_VECTOR_ELT: in LowerOperation()
3813 case ISD::INSERT_VECTOR_ELT: { in ReplaceNodeResults()
4339 SDValue InsHalf = DAG.getNode(ISD::INSERT_VECTOR_ELT, SL, MVT::v2i16, in lowerINSERT_VECTOR_ELT()
7823 case ISD::INSERT_VECTOR_ELT: { in isCanonicalized()
9005 case ISD::INSERT_VECTOR_ELT: in PerformDAGCombine()