Lines Matching refs:AMDGPU
141 case AMDGPU::V_MAC_F32_e64: in isInlineConstantIfFolded()
142 case AMDGPU::V_MAC_F16_e64: in isInlineConstantIfFolded()
143 case AMDGPU::V_FMAC_F32_e64: { in isInlineConstantIfFolded()
146 int Src2Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src2); in isInlineConstantIfFolded()
148 bool IsFMA = Opc == AMDGPU::V_FMAC_F32_e64; in isInlineConstantIfFolded()
149 bool IsF32 = Opc == AMDGPU::V_MAC_F32_e64; in isInlineConstantIfFolded()
152 AMDGPU::V_FMA_F32 : (IsF32 ? AMDGPU::V_MAD_F32 : AMDGPU::V_MAD_F16); in isInlineConstantIfFolded()
181 if (OpNo == AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::src0)) in updateOperand()
182 ModIdx = AMDGPU::OpName::src0_modifiers; in updateOperand()
183 else if (OpNo == AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::src1)) in updateOperand()
184 ModIdx = AMDGPU::OpName::src1_modifiers; in updateOperand()
185 else if (OpNo == AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::src2)) in updateOperand()
186 ModIdx = AMDGPU::OpName::src2_modifiers; in updateOperand()
188 ModIdx = AMDGPU::getNamedOperandIdx(Opcode, ModIdx); in updateOperand()
208 auto Liveness = MBB->computeRegisterLiveness(&TRI, AMDGPU::VCC, MI); in updateOperand()
226 BuildMI(*MBB, MI, MI->getDebugLoc(), TII.get(AMDGPU::COPY), Dst1.getReg()) in updateOperand()
227 .addReg(AMDGPU::VCC, RegState::Kill); in updateOperand()
239 MI->setDesc(TII.get(AMDGPU::IMPLICIT_DEF)); in updateOperand()
289 if ((Opc == AMDGPU::V_MAC_F32_e64 || Opc == AMDGPU::V_MAC_F16_e64 || in tryAddToFoldList()
290 Opc == AMDGPU::V_FMAC_F32_e64) && in tryAddToFoldList()
291 (int)OpNo == AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src2)) { in tryAddToFoldList()
292 bool IsFMA = Opc == AMDGPU::V_FMAC_F32_e64; in tryAddToFoldList()
293 bool IsF32 = Opc == AMDGPU::V_MAC_F32_e64; in tryAddToFoldList()
295 AMDGPU::V_FMA_F32 : (IsF32 ? AMDGPU::V_MAD_F32 : AMDGPU::V_MAD_F16); in tryAddToFoldList()
309 if (Opc == AMDGPU::S_SETREG_B32 && OpToFold->isImm()) { in tryAddToFoldList()
310 MI->setDesc(TII->get(AMDGPU::S_SETREG_IMM32_B32)); in tryAddToFoldList()
350 if ((Opc == AMDGPU::V_ADD_I32_e64 || in tryAddToFoldList()
351 Opc == AMDGPU::V_SUB_I32_e64 || in tryAddToFoldList()
352 Opc == AMDGPU::V_SUBREV_I32_e64) && // FIXME in tryAddToFoldList()
368 int Op32 = AMDGPU::getVOPe32(MaybeCommutedOpc); in tryAddToFoldList()
409 if (UseOp.isImplicit() || UseOp.getSubReg() != AMDGPU::NoSubRegister) in foldOperand()
421 if (UseOp.isTied() && OpToFold.getSubReg() != AMDGPU::NoSubRegister) in foldOperand()
483 if (MovOp == AMDGPU::COPY) in foldOperand()
529 if (UseOp.getSubReg() && AMDGPU::getRegBitWidth(FoldRC->getID()) == 64) { in foldOperand()
536 if (AMDGPU::getRegBitWidth(UseRC->getID()) != 64) in foldOperand()
540 if (UseOp.getSubReg() == AMDGPU::sub0) { in foldOperand()
543 assert(UseOp.getSubReg() == AMDGPU::sub1); in foldOperand()
560 case AMDGPU::V_AND_B32_e64: in evalBinaryInstruction()
561 case AMDGPU::V_AND_B32_e32: in evalBinaryInstruction()
562 case AMDGPU::S_AND_B32: in evalBinaryInstruction()
565 case AMDGPU::V_OR_B32_e64: in evalBinaryInstruction()
566 case AMDGPU::V_OR_B32_e32: in evalBinaryInstruction()
567 case AMDGPU::S_OR_B32: in evalBinaryInstruction()
570 case AMDGPU::V_XOR_B32_e64: in evalBinaryInstruction()
571 case AMDGPU::V_XOR_B32_e32: in evalBinaryInstruction()
572 case AMDGPU::S_XOR_B32: in evalBinaryInstruction()
575 case AMDGPU::V_LSHL_B32_e64: in evalBinaryInstruction()
576 case AMDGPU::V_LSHL_B32_e32: in evalBinaryInstruction()
577 case AMDGPU::S_LSHL_B32: in evalBinaryInstruction()
581 case AMDGPU::V_LSHLREV_B32_e64: in evalBinaryInstruction()
582 case AMDGPU::V_LSHLREV_B32_e32: in evalBinaryInstruction()
585 case AMDGPU::V_LSHR_B32_e64: in evalBinaryInstruction()
586 case AMDGPU::V_LSHR_B32_e32: in evalBinaryInstruction()
587 case AMDGPU::S_LSHR_B32: in evalBinaryInstruction()
590 case AMDGPU::V_LSHRREV_B32_e64: in evalBinaryInstruction()
591 case AMDGPU::V_LSHRREV_B32_e32: in evalBinaryInstruction()
594 case AMDGPU::V_ASHR_I32_e64: in evalBinaryInstruction()
595 case AMDGPU::V_ASHR_I32_e32: in evalBinaryInstruction()
596 case AMDGPU::S_ASHR_I32: in evalBinaryInstruction()
599 case AMDGPU::V_ASHRREV_I32_e64: in evalBinaryInstruction()
600 case AMDGPU::V_ASHRREV_I32_e32: in evalBinaryInstruction()
609 return IsScalar ? AMDGPU::S_MOV_B32 : AMDGPU::V_MOV_B32_e32; in getMovOpc()
634 if (Op.getSubReg() != AMDGPU::NoSubRegister || in getImmOrMaterializedImm()
657 if (Opc == AMDGPU::V_NOT_B32_e64 || Opc == AMDGPU::V_NOT_B32_e32 || in tryConstantFoldOp()
658 Opc == AMDGPU::S_NOT_B32) { in tryConstantFoldOp()
660 mutateCopyOp(*MI, TII->get(getMovOpc(Opc == AMDGPU::S_NOT_B32))); in tryConstantFoldOp()
664 int Src1Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src1); in tryConstantFoldOp()
668 int Src0Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src0); in tryConstantFoldOp()
675 if (MI->getOpcode() == AMDGPU::V_LSHL_OR_B32) { in tryConstantFoldOp()
679 bool UseCopy = TII->getNamedOperand(*MI, AMDGPU::OpName::src2)->isReg(); in tryConstantFoldOp()
683 MI->setDesc(TII->get(UseCopy ? AMDGPU::COPY : AMDGPU::V_MOV_B32_e32)); in tryConstantFoldOp()
716 if (Opc == AMDGPU::V_OR_B32_e64 || in tryConstantFoldOp()
717 Opc == AMDGPU::V_OR_B32_e32 || in tryConstantFoldOp()
718 Opc == AMDGPU::S_OR_B32) { in tryConstantFoldOp()
722 mutateCopyOp(*MI, TII->get(AMDGPU::COPY)); in tryConstantFoldOp()
726 mutateCopyOp(*MI, TII->get(getMovOpc(Opc == AMDGPU::S_OR_B32))); in tryConstantFoldOp()
733 if (MI->getOpcode() == AMDGPU::V_AND_B32_e64 || in tryConstantFoldOp()
734 MI->getOpcode() == AMDGPU::V_AND_B32_e32 || in tryConstantFoldOp()
735 MI->getOpcode() == AMDGPU::S_AND_B32) { in tryConstantFoldOp()
739 mutateCopyOp(*MI, TII->get(getMovOpc(Opc == AMDGPU::S_AND_B32))); in tryConstantFoldOp()
743 mutateCopyOp(*MI, TII->get(AMDGPU::COPY)); in tryConstantFoldOp()
751 if (MI->getOpcode() == AMDGPU::V_XOR_B32_e64 || in tryConstantFoldOp()
752 MI->getOpcode() == AMDGPU::V_XOR_B32_e32 || in tryConstantFoldOp()
753 MI->getOpcode() == AMDGPU::S_XOR_B32) { in tryConstantFoldOp()
757 mutateCopyOp(*MI, TII->get(AMDGPU::COPY)); in tryConstantFoldOp()
770 if (Opc == AMDGPU::V_CNDMASK_B32_e32 || in tryFoldInst()
771 Opc == AMDGPU::V_CNDMASK_B32_e64 || in tryFoldInst()
772 Opc == AMDGPU::V_CNDMASK_B64_PSEUDO) { in tryFoldInst()
773 const MachineOperand *Src0 = TII->getNamedOperand(*MI, AMDGPU::OpName::src0); in tryFoldInst()
774 const MachineOperand *Src1 = TII->getNamedOperand(*MI, AMDGPU::OpName::src1); in tryFoldInst()
777 int Src2Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src2); in tryFoldInst()
780 MI->RemoveOperand(AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src1)); in tryFoldInst()
781 mutateCopyOp(*MI, TII->get(Src0->isReg() ? (unsigned)AMDGPU::COPY in tryFoldInst()
911 case AMDGPU::V_MAX_F32_e64: in isClamp()
912 case AMDGPU::V_MAX_F16_e64: in isClamp()
913 case AMDGPU::V_MAX_F64: in isClamp()
914 case AMDGPU::V_PK_MAX_F16: { in isClamp()
915 if (!TII->getNamedOperand(MI, AMDGPU::OpName::clamp)->getImm()) in isClamp()
919 const MachineOperand *Src0 = TII->getNamedOperand(MI, AMDGPU::OpName::src0); in isClamp()
920 const MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1); in isClamp()
924 Src0->getSubReg() != AMDGPU::NoSubRegister) in isClamp()
928 if (TII->hasModifiersSet(MI, AMDGPU::OpName::omod)) in isClamp()
932 = TII->getNamedOperand(MI, AMDGPU::OpName::src0_modifiers)->getImm(); in isClamp()
934 = TII->getNamedOperand(MI, AMDGPU::OpName::src1_modifiers)->getImm(); in isClamp()
938 unsigned UnsetMods = (Op == AMDGPU::V_PK_MAX_F16) ? SISrcMods::OP_SEL_1 : 0; in isClamp()
973 MachineOperand *DefClamp = TII->getNamedOperand(*Def, AMDGPU::OpName::clamp); in tryFoldClamp()
989 case AMDGPU::V_MUL_F32_e64: { in getOModValue()
1001 case AMDGPU::V_MUL_F16_e64: { in getOModValue()
1025 case AMDGPU::V_MUL_F32_e64: in isOMod()
1026 case AMDGPU::V_MUL_F16_e64: { in isOMod()
1028 if ((Op == AMDGPU::V_MUL_F32_e64 && ST->hasFP32Denormals()) || in isOMod()
1029 (Op == AMDGPU::V_MUL_F16_e64 && ST->hasFP16Denormals())) in isOMod()
1034 const MachineOperand *Src0 = TII->getNamedOperand(MI, AMDGPU::OpName::src0); in isOMod()
1035 const MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1); in isOMod()
1047 TII->hasModifiersSet(MI, AMDGPU::OpName::src0_modifiers) || in isOMod()
1048 TII->hasModifiersSet(MI, AMDGPU::OpName::src1_modifiers) || in isOMod()
1049 TII->hasModifiersSet(MI, AMDGPU::OpName::omod) || in isOMod()
1050 TII->hasModifiersSet(MI, AMDGPU::OpName::clamp)) in isOMod()
1055 case AMDGPU::V_ADD_F32_e64: in isOMod()
1056 case AMDGPU::V_ADD_F16_e64: { in isOMod()
1058 if ((Op == AMDGPU::V_ADD_F32_e64 && ST->hasFP32Denormals()) || in isOMod()
1059 (Op == AMDGPU::V_ADD_F16_e64 && ST->hasFP16Denormals())) in isOMod()
1063 const MachineOperand *Src0 = TII->getNamedOperand(MI, AMDGPU::OpName::src0); in isOMod()
1064 const MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1); in isOMod()
1068 !TII->hasModifiersSet(MI, AMDGPU::OpName::src0_modifiers) && in isOMod()
1069 !TII->hasModifiersSet(MI, AMDGPU::OpName::src1_modifiers) && in isOMod()
1070 !TII->hasModifiersSet(MI, AMDGPU::OpName::clamp) && in isOMod()
1071 !TII->hasModifiersSet(MI, AMDGPU::OpName::omod)) in isOMod()
1087 RegOp->getSubReg() != AMDGPU::NoSubRegister || in tryFoldOMod()
1092 MachineOperand *DefOMod = TII->getNamedOperand(*Def, AMDGPU::OpName::omod); in tryFoldOMod()
1098 if (TII->hasModifiersSet(*Def, AMDGPU::OpName::clamp)) in tryFoldOMod()