58   const R600InstrInfo *TII;  member in __anon03439b720111::R600PacketizerList
73     if (!TII->isALUInstr(I->getOpcode()) && !I->isBundle())  in getPreviousVector()
85       if (TII->isPredicated(*BI))  in getPreviousVector()
87       int OperandIdx = TII->getOperandIdx(BI->getOpcode(), R600::OpName::write);  in getPreviousVector()
90       int DstIdx = TII->getOperandIdx(BI->getOpcode(), R600::OpName::dst);  in getPreviousVector()
95       if (isTrans || TII->isTransOnly(*BI)) {  in getPreviousVector()
137       int OperandIdx = TII->getOperandIdx(MI.getOpcode(), Ops[i]);  in substitutePV()
151         TII(ST.getInstrInfo()),  in R600PacketizerList()
152         TRI(TII->getRegisterInfo()) {  in R600PacketizerList()
170     if (TII->isVector(MI))  in isSoloInstruction()
172     if (!TII->isALUInstr(MI.getOpcode()))  in isSoloInstruction()
178     return TII->isLDSInstr(MI.getOpcode());  in isSoloInstruction()
188     int OpI = TII->getOperandIdx(MII->getOpcode(), R600::OpName::pred_sel),  in isLegalToPacketizeTogether()
189         OpJ = TII->getOperandIdx(MIJ->getOpcode(), R600::OpName::pred_sel);  in isLegalToPacketizeTogether()
209         TII->definesAddressRegister(*MII) || TII->definesAddressRegister(*MIJ);  in isLegalToPacketizeTogether()
211         TII->usesAddressRegister(*MII) || TII->usesAddressRegister(*MIJ);  in isLegalToPacketizeTogether()
223     unsigned LastOp = TII->getOperandIdx(MI->getOpcode(), R600::OpName::last);  in setIsLastBit()
231     isTransSlot = TII->isTransOnly(MI);  in isBundlableWithCurrentPMI()
238             !TII->isVectorOnly(MI) && VLIW5) {  in isBundlableWithCurrentPMI()
252     if (!TII->fitsConstReadLimitations(CurrentPacketMIs)) {  in isBundlableWithCurrentPMI()
268     if (!TII->fitsReadPortLimitations(CurrentPacketMIs,  in isBundlableWithCurrentPMI()
285     if (isTransSlot && TII->readsLDSSrcReg(MI))  in isBundlableWithCurrentPMI()
303         unsigned Op = TII->getOperandIdx(MI->getOpcode(),  in addToPacket()
308           TII->getOperandIdx(MI.getOpcode(), R600::OpName::bank_swizzle);  in addToPacket()
320     if (TII->isTransOnly(MI))  in addToPacket()
328   const R600InstrInfo *TII = ST.getInstrInfo();  in runOnMachineFunction()  local
380         if (TII->isSchedulingBoundary(*std::prev(I), &*MBB, Fn))  in runOnMachineFunction()