87   const AMDGPUAsmParser *AsmParser;  member in __anon2619dd210111::AMDGPUOperand
91     : MCParsedAsmOperand(), Kind(Kind_), AsmParser(AsmParser_) {}  in AMDGPUOperand()
723   static AMDGPUOperand::Ptr CreateImm(const AMDGPUAsmParser *AsmParser,  in CreateImm()  argument
727     auto Op = llvm::make_unique<AMDGPUOperand>(Immediate, AsmParser);  in CreateImm()
737   static AMDGPUOperand::Ptr CreateToken(const AMDGPUAsmParser *AsmParser,  in CreateToken()  argument
740     auto Res = llvm::make_unique<AMDGPUOperand>(Token, AsmParser);  in CreateToken()
748   static AMDGPUOperand::Ptr CreateReg(const AMDGPUAsmParser *AsmParser,  in CreateReg()  argument
752     auto Op = llvm::make_unique<AMDGPUOperand>(Register, AsmParser);  in CreateReg()
761   static AMDGPUOperand::Ptr CreateExpr(const AMDGPUAsmParser *AsmParser,  in CreateExpr()  argument
763     auto Op = llvm::make_unique<AMDGPUOperand>(Expression, AsmParser);  in CreateExpr()
1260                                           AsmParser->hasInv2PiInlineImm());  in isInlinableImm()
1270         AsmParser->hasInv2PiInlineImm());  in isInlinableImm()
1276       AsmParser->hasInv2PiInlineImm());  in isInlinableImm()
1282                                         AsmParser->hasInv2PiInlineImm());  in isInlinableImm()
1288       AsmParser->hasInv2PiInlineImm());  in isInlinableImm()
1293     AsmParser->hasInv2PiInlineImm());  in isInlinableImm()
1338   return isRegKind() && AsmParser->getMRI()->getRegClass(RCID).contains(getReg());  in isRegClass()
1342   if (AsmParser->isVI())  in isSDWAOperand()
1344   else if (AsmParser->isGFX9())  in isSDWAOperand()
1384   if (AMDGPU::isSISrcOperand(AsmParser->getMII()->get(Inst.getOpcode()),  in addImmOperands()
1396   const auto& InstDesc = AsmParser->getMII()->get(Inst.getOpcode());  in addLiteralImmOperand()
1417                                        AsmParser->hasInv2PiInlineImm())) {  in addLiteralImmOperand()
1426           const_cast<AMDGPUAsmParser *>(AsmParser)->Warning(Inst.getLoc(),  in addLiteralImmOperand()
1484                                      AsmParser->hasInv2PiInlineImm())) {  in addLiteralImmOperand()
1496     if (AMDGPU::isInlinableLiteral64(Val, AsmParser->hasInv2PiInlineImm())) {  in addLiteralImmOperand()
1510                                      AsmParser->hasInv2PiInlineImm())) {  in addLiteralImmOperand()
1522                                         AsmParser->hasInv2PiInlineImm()));  in addLiteralImmOperand()
1552   Inst.addOperand(MCOperand::createReg(AMDGPU::getMCReg(getReg(), AsmParser->getSTI())));  in addRegOperands()