70 class AMDGPUAsmParser;
87   const AMDGPUAsmParser *AsmParser;
90   AMDGPUOperand(KindTy Kind_, const AMDGPUAsmParser *AsmParser_)  in AMDGPUOperand()
723   static AMDGPUOperand::Ptr CreateImm(const AMDGPUAsmParser *AsmParser,  in CreateImm()
737   static AMDGPUOperand::Ptr CreateToken(const AMDGPUAsmParser *AsmParser,  in CreateToken()
748   static AMDGPUOperand::Ptr CreateReg(const AMDGPUAsmParser *AsmParser,  in CreateReg()
761   static AMDGPUOperand::Ptr CreateExpr(const AMDGPUAsmParser *AsmParser,  in CreateExpr()
826 class AMDGPUAsmParser : public MCTargetAsmParser {  class
903   AMDGPUAsmParser(const MCSubtargetInfo &STI, MCAsmParser &_Parser,  in AMDGPUAsmParser()  function in __anon2619dd210111::AMDGPUAsmParser
996     return const_cast<AMDGPUAsmParser*>(this)->getContext().getRegisterInfo();  in getMRI()
1426           const_cast<AMDGPUAsmParser *>(AsmParser)->Warning(Inst.getLoc(),  in addLiteralImmOperand()
1617 bool AMDGPUAsmParser::ParseRegister(unsigned &RegNo, SMLoc &StartLoc,  in ParseRegister()
1628 bool AMDGPUAsmParser::AddNextRegisterToList(unsigned &Reg, unsigned &RegWidth,  in AddNextRegisterToList()
1677 bool AMDGPUAsmParser::ParseAMDGPURegister(RegisterKind &RegKind, unsigned &Reg,  in ParseAMDGPURegister()
1807 AMDGPUAsmParser::getGprCountSymbolName(RegisterKind RegKind) {  in getGprCountSymbolName()
1818 void AMDGPUAsmParser::initializeGprCountSymbol(RegisterKind RegKind) {  in initializeGprCountSymbol()
1825 bool AMDGPUAsmParser::updateGprCountSymbols(RegisterKind RegKind,  in updateGprCountSymbols()
1854 std::unique_ptr<AMDGPUOperand> AMDGPUAsmParser::parseRegister() {  in parseRegister()
1873 AMDGPUAsmParser::parseAbsoluteExpr(int64_t &Val, bool AbsMod) {  in parseAbsoluteExpr()
1897 AMDGPUAsmParser::parseImm(OperandVector &Operands, bool AbsMod) {  in parseImm()
1940 AMDGPUAsmParser::parseReg(OperandVector &Operands) {  in parseReg()
1951 AMDGPUAsmParser::parseRegOrImm(OperandVector &Operands, bool AbsMod) {  in parseRegOrImm()
1961 AMDGPUAsmParser::parseRegOrImmWithFPInputMods(OperandVector &Operands,  in parseRegOrImmWithFPInputMods()
2070 AMDGPUAsmParser::parseRegOrImmWithIntInputMods(OperandVector &Operands,  in parseRegOrImmWithIntInputMods()
2114 AMDGPUAsmParser::parseRegWithFPInputMods(OperandVector &Operands) {  in parseRegWithFPInputMods()
2119 AMDGPUAsmParser::parseRegWithIntInputMods(OperandVector &Operands) {  in parseRegWithIntInputMods()
2123 OperandMatchResultTy AMDGPUAsmParser::parseVReg32OrOff(OperandVector &Operands) {  in parseVReg32OrOff()
2141 unsigned AMDGPUAsmParser::checkTargetMatchPredicate(MCInst &Inst) {  in checkTargetMatchPredicate()
2179 ArrayRef<unsigned> AMDGPUAsmParser::getMatchedVariants() const {  in getMatchedVariants()
2209 unsigned AMDGPUAsmParser::findImplicitSGPRReadInVOP(const MCInst &Inst) const {  in findImplicitSGPRReadInVOP()
2230 bool AMDGPUAsmParser::isInlineConstant(const MCInst &Inst,  in isInlineConstant()
2262 bool AMDGPUAsmParser::usesConstantBus(const MCInst &Inst, unsigned OpIdx) {  in usesConstantBus()
2271 bool AMDGPUAsmParser::validateConstantBusLimitations(const MCInst &Inst) {  in validateConstantBusLimitations()
2324 bool AMDGPUAsmParser::validateEarlyClobberLimitations(const MCInst &Inst) {  in validateEarlyClobberLimitations()
2361 bool AMDGPUAsmParser::validateIntClampSupported(const MCInst &Inst) {  in validateIntClampSupported()
2375 bool AMDGPUAsmParser::validateMIMGDataSize(const MCInst &Inst) {  in validateMIMGDataSize()
2408 bool AMDGPUAsmParser::validateMIMGAtomicDMask(const MCInst &Inst) {  in validateMIMGAtomicDMask()
2428 bool AMDGPUAsmParser::validateMIMGGatherDMask(const MCInst &Inst) {  in validateMIMGGatherDMask()
2447 bool AMDGPUAsmParser::validateMIMGD16(const MCInst &Inst) {  in validateMIMGD16()
2464 bool AMDGPUAsmParser::validateInstruction(const MCInst &Inst,  in validateInstruction()
2509 bool AMDGPUAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,  in MatchAndEmitInstruction()
2579 bool AMDGPUAsmParser::ParseAsAbsoluteExpression(uint32_t &Ret) {  in ParseAsAbsoluteExpression()
2591 bool AMDGPUAsmParser::ParseDirectiveMajorMinor(uint32_t &Major,  in ParseDirectiveMajorMinor()
2606 bool AMDGPUAsmParser::ParseDirectiveAMDGCNTarget() {  in ParseDirectiveAMDGCNTarget()
2629 bool AMDGPUAsmParser::OutOfRangeError(SMRange Range) {  in OutOfRangeError()
2633 bool AMDGPUAsmParser::calculateGPRBlocks(  in calculateGPRBlocks()
2666 bool AMDGPUAsmParser::ParseDirectiveAMDHSAKernel() {  in ParseDirectiveAMDHSAKernel()
2919 bool AMDGPUAsmParser::ParseDirectiveHSACodeObjectVersion() {  in ParseDirectiveHSACodeObjectVersion()
2930 bool AMDGPUAsmParser::ParseDirectiveHSACodeObjectISA() {  in ParseDirectiveHSACodeObjectISA()
2982 bool AMDGPUAsmParser::ParseAMDKernelCodeTValue(StringRef ID,  in ParseAMDKernelCodeTValue()
3000 bool AMDGPUAsmParser::ParseDirectiveAMDKernelCodeT() {  in ParseDirectiveAMDKernelCodeT()
3028 bool AMDGPUAsmParser::ParseDirectiveAMDGPUHsaKernel() {  in ParseDirectiveAMDGPUHsaKernel()
3042 bool AMDGPUAsmParser::ParseDirectiveISAVersion() {  in ParseDirectiveISAVersion()
3067 bool AMDGPUAsmParser::ParseDirectiveHSAMetadata() {  in ParseDirectiveHSAMetadata()
3130 bool AMDGPUAsmParser::ParseDirectivePALMetadata() {  in ParseDirectivePALMetadata()
3153 bool AMDGPUAsmParser::ParseDirective(AsmToken DirectiveID) {  in ParseDirective()
3192 bool AMDGPUAsmParser::subtargetHasRegister(const MCRegisterInfo &MRI,  in subtargetHasRegister()
3244 AMDGPUAsmParser::parseOperand(OperandVector &Operands, StringRef Mnemonic) {  in parseOperand()
3282 StringRef AMDGPUAsmParser::parseMnemonicSuffix(StringRef Name) {  in parseMnemonicSuffix()
3304 bool AMDGPUAsmParser::ParseInstruction(ParseInstructionInfo &Info,  in ParseInstruction()
3343 AMDGPUAsmParser::parseIntWithPrefix(const char *Prefix, int64_t &Int) {  in parseIntWithPrefix()
3379 AMDGPUAsmParser::parseIntWithPrefix(const char *Prefix, OperandVector &Operands,  in parseIntWithPrefix()
3397 OperandMatchResultTy AMDGPUAsmParser::parseOperandArrayWithPrefix(  in parseOperandArrayWithPrefix()
3448 AMDGPUAsmParser::parseNamedBit(const char *Name, OperandVector &Operands,  in parseNamedBit()
3485   AMDGPUAsmParser::OptionalImmIndexMap& OptionalIdx,  in addOptionalImmOperand()
3498 AMDGPUAsmParser::parseStringWithPrefix(StringRef Prefix, StringRef &Value) {  in parseStringWithPrefix()
3524 AMDGPUAsmParser::parseDfmtNfmt(OperandVector &Operands) {  in parseDfmtNfmt()
3572 void AMDGPUAsmParser::cvtDSOffset01(MCInst &Inst,  in cvtDSOffset01()
3596 void AMDGPUAsmParser::cvtDSImpl(MCInst &Inst, const OperandVector &Operands,  in cvtDSImpl()
3631 void AMDGPUAsmParser::cvtExp(MCInst &Inst, const OperandVector &Operands) {  in cvtExp()
3718 bool AMDGPUAsmParser::parseCnt(int64_t &IntVal) {  in parseCnt()
3768 AMDGPUAsmParser::parseSWaitCntOps(OperandVector &Operands) {  in parseSWaitCntOps()
3792 bool AMDGPUAsmParser::parseHwregConstruct(OperandInfoTy &HwReg, int64_t &Offset,  in parseHwregConstruct()
3857 OperandMatchResultTy AMDGPUAsmParser::parseHwreg(OperandVector &Operands) {  in parseHwreg()
3908 bool AMDGPUAsmParser::parseSendMsgConstruct(OperandInfoTy &Msg, OperandInfoTy &Operation, int64_t &…  in parseSendMsgConstruct()
4004 OperandMatchResultTy AMDGPUAsmParser::parseInterpSlot(OperandVector &Operands) {  in parseInterpSlot()
4025 OperandMatchResultTy AMDGPUAsmParser::parseInterpAttr(OperandVector &Operands) {  in parseInterpAttr()
4065 void AMDGPUAsmParser::errorExpTgt() {  in errorExpTgt()
4069 OperandMatchResultTy AMDGPUAsmParser::parseExpTgtImpl(StringRef Str,  in parseExpTgtImpl()
4128 OperandMatchResultTy AMDGPUAsmParser::parseExpTgt(OperandVector &Operands) {  in parseExpTgt()
4145 AMDGPUAsmParser::parseSendMsgOp(OperandVector &Operands) {  in parseSendMsgOp()
4232 AMDGPUAsmParser::trySkipId(const StringRef Id) {  in trySkipId()
4242 AMDGPUAsmParser::trySkipToken(const AsmToken::TokenKind Kind) {  in trySkipToken()
4251 AMDGPUAsmParser::skipToken(const AsmToken::TokenKind Kind,  in skipToken()
4261 AMDGPUAsmParser::parseExpr(int64_t &Imm) {  in parseExpr()
4266 AMDGPUAsmParser::parseString(StringRef &Val, const StringRef ErrMsg) {  in parseString()
4296 AMDGPUAsmParser::parseSwizzleOperands(const unsigned OpNum, int64_t* Op,  in parseSwizzleOperands()
4318 AMDGPUAsmParser::parseSwizzleQuadPerm(int64_t &Imm) {  in parseSwizzleQuadPerm()
4334 AMDGPUAsmParser::parseSwizzleBroadcast(int64_t &Imm) {  in parseSwizzleBroadcast()
4360 AMDGPUAsmParser::parseSwizzleReverse(int64_t &Imm) {  in parseSwizzleReverse()
4380 AMDGPUAsmParser::parseSwizzleSwap(int64_t &Imm) {  in parseSwizzleSwap()
4400 AMDGPUAsmParser::parseSwizzleBitmaskPerm(int64_t &Imm) {  in parseSwizzleBitmaskPerm()
4447 AMDGPUAsmParser::parseSwizzleOffset(int64_t &Imm) {  in parseSwizzleOffset()
4462 AMDGPUAsmParser::parseSwizzleMacro(int64_t &Imm) {  in parseSwizzleMacro()
4491 AMDGPUAsmParser::parseSwizzleOp(OperandVector &Operands) {  in parseSwizzleOp()
4526 AMDGPUAsmParser::parseSOppBrTarget(OperandVector &Operands) {  in parseSOppBrTarget()
4552 AMDGPUOperand::Ptr AMDGPUAsmParser::defaultGLC() const {  in defaultGLC()
4556 AMDGPUOperand::Ptr AMDGPUAsmParser::defaultSLC() const {  in defaultSLC()
4560 void AMDGPUAsmParser::cvtMubufImpl(MCInst &Inst,  in cvtMubufImpl()
4630 void AMDGPUAsmParser::cvtMtbuf(MCInst &Inst, const OperandVector &Operands) {  in cvtMtbuf()
4671 void AMDGPUAsmParser::cvtMIMG(MCInst &Inst, const OperandVector &Operands,  in cvtMIMG()
4711 void AMDGPUAsmParser::cvtMIMGAtomic(MCInst &Inst, const OperandVector &Operands) {  in cvtMIMGAtomic()
4733 AMDGPUOperand::Ptr AMDGPUAsmParser::defaultSMRDOffset8() const {  in defaultSMRDOffset8()
4737 AMDGPUOperand::Ptr AMDGPUAsmParser::defaultSMRDOffset20() const {  in defaultSMRDOffset20()
4741 AMDGPUOperand::Ptr AMDGPUAsmParser::defaultSMRDLiteralOffset() const {  in defaultSMRDLiteralOffset()
4745 AMDGPUOperand::Ptr AMDGPUAsmParser::defaultOffsetU12() const {  in defaultOffsetU12()
4749 AMDGPUOperand::Ptr AMDGPUAsmParser::defaultOffsetS13() const {  in defaultOffsetS13()
4834 OperandMatchResultTy AMDGPUAsmParser::parseOptionalOperand(OperandVector &Operands) {  in parseOptionalOperand()
4867 OperandMatchResultTy AMDGPUAsmParser::parseOptionalOpr(OperandVector &Operands) {  in parseOptionalOpr()
4899 OperandMatchResultTy AMDGPUAsmParser::parseOModOperand(OperandVector &Operands) {  in parseOModOperand()
4914 void AMDGPUAsmParser::cvtVOP3OpSel(MCInst &Inst, const OperandVector &Operands) {  in cvtVOP3OpSel()
4949 void AMDGPUAsmParser::cvtVOP3Interp(MCInst &Inst, const OperandVector &Operands)  in cvtVOP3Interp()
4988 void AMDGPUAsmParser::cvtVOP3(MCInst &Inst, const OperandVector &Operands,  in cvtVOP3()
5048 void AMDGPUAsmParser::cvtVOP3(MCInst &Inst, const OperandVector &Operands) {  in cvtVOP3()
5053 void AMDGPUAsmParser::cvtVOP3P(MCInst &Inst,  in cvtVOP3P()
5175 AMDGPUAsmParser::parseDPPCtrl(OperandVector &Operands) {  in parseDPPCtrl()
5275 AMDGPUOperand::Ptr AMDGPUAsmParser::defaultRowMask() const {  in defaultRowMask()
5279 AMDGPUOperand::Ptr AMDGPUAsmParser::defaultBankMask() const {  in defaultBankMask()
5283 AMDGPUOperand::Ptr AMDGPUAsmParser::defaultBoundCtrl() const {  in defaultBoundCtrl()
5287 void AMDGPUAsmParser::cvtDPP(MCInst &Inst, const OperandVector &Operands) {  in cvtDPP()
5332 AMDGPUAsmParser::parseSDWASel(OperandVector &Operands, StringRef Prefix,  in parseSDWASel()
5366 AMDGPUAsmParser::parseSDWADstUnused(OperandVector &Operands) {  in parseSDWADstUnused()
5394 void AMDGPUAsmParser::cvtSdwaVOP1(MCInst &Inst, const OperandVector &Operands) {  in cvtSdwaVOP1()
5398 void AMDGPUAsmParser::cvtSdwaVOP2(MCInst &Inst, const OperandVector &Operands) {  in cvtSdwaVOP2()
5402 void AMDGPUAsmParser::cvtSdwaVOP2b(MCInst &Inst, const OperandVector &Operands) {  in cvtSdwaVOP2b()
5406 void AMDGPUAsmParser::cvtSdwaVOPC(MCInst &Inst, const OperandVector &Operands) {  in cvtSdwaVOPC()
5410 void AMDGPUAsmParser::cvtSDWA(MCInst &Inst, const OperandVector &Operands,  in cvtSDWA()
5500   RegisterMCAsmParser<AMDGPUAsmParser> A(getTheAMDGPUTarget());  in LLVMInitializeAMDGPUAsmParser()
5501   RegisterMCAsmParser<AMDGPUAsmParser> B(getTheGCNTarget());  in LLVMInitializeAMDGPUAsmParser()
5511 unsigned AMDGPUAsmParser::validateTargetOperandClass(MCParsedAsmOperand &Op,  in validateTargetOperandClass()