Lines Matching refs:SDLoc
37 SDValue getFFBX_U32(SelectionDAG &DAG, SDValue Op, const SDLoc &DL, unsigned Opc) const;
83 SDValue splitBinaryBitConstantOpImpl(DAGCombinerInfo &DCI, const SDLoc &SL,
94 SDValue performCtlz_CttzCombine(const SDLoc &SL, SDValue Cond, SDValue LHS,
186 const SmallVectorImpl<SDValue> &OutVals, const SDLoc &DL,
209 SDValue combineFMinMaxLegacy(const SDLoc &DL, EVT VT, SDValue LHS,
263 const SDLoc &SL,
268 return CreateLiveInRegister(DAG, RC, Reg, VT, SDLoc(DAG.getEntryNode())); in CreateLiveInRegister()
275 return CreateLiveInRegister(DAG, RC, Reg, VT, SDLoc(DAG.getEntryNode()), true); in CreateLiveInRegisterRaw()
282 const SDLoc &SL,
286 const SDLoc &SL,
293 EVT VT, const SDLoc &SL,