Lines Matching refs:SDValue
101 std::pair<SDValue, SDValue> foldFrameIndex(SDValue N) const;
102 bool isNoNanSrc(SDValue N) const;
113 virtual bool SelectADDRVTX_READ(SDValue Addr, SDValue &Base, SDValue &Offset);
114 virtual bool SelectADDRIndirect(SDValue Addr, SDValue &Base, SDValue &Offset);
115 bool isDSOffsetLegal(const SDValue &Base, unsigned Offset,
117 bool SelectDS1Addr1Offset(SDValue Ptr, SDValue &Base, SDValue &Offset) const;
118 bool SelectDS64Bit4ByteAligned(SDValue Ptr, SDValue &Base, SDValue &Offset0,
119 SDValue &Offset1) const;
120 bool SelectMUBUF(SDValue Addr, SDValue &SRsrc, SDValue &VAddr,
121 SDValue &SOffset, SDValue &Offset, SDValue &Offen,
122 SDValue &Idxen, SDValue &Addr64, SDValue &GLC, SDValue &SLC,
123 SDValue &TFE) const;
124 bool SelectMUBUFAddr64(SDValue Addr, SDValue &SRsrc, SDValue &VAddr,
125 SDValue &SOffset, SDValue &Offset, SDValue &GLC,
126 SDValue &SLC, SDValue &TFE) const;
127 bool SelectMUBUFAddr64(SDValue Addr, SDValue &SRsrc,
128 SDValue &VAddr, SDValue &SOffset, SDValue &Offset,
129 SDValue &SLC) const;
131 SDValue Addr, SDValue &RSrc, SDValue &VAddr,
132 SDValue &SOffset, SDValue &ImmOffset) const;
134 SDValue Addr, SDValue &SRsrc, SDValue &Soffset,
135 SDValue &Offset) const;
137 bool SelectMUBUFOffset(SDValue Addr, SDValue &SRsrc, SDValue &SOffset,
138 SDValue &Offset, SDValue &GLC, SDValue &SLC,
139 SDValue &TFE) const;
140 bool SelectMUBUFOffset(SDValue Addr, SDValue &SRsrc, SDValue &Soffset,
141 SDValue &Offset, SDValue &SLC) const;
142 bool SelectMUBUFOffset(SDValue Addr, SDValue &SRsrc, SDValue &Soffset,
143 SDValue &Offset) const;
145 bool SelectFlatAtomic(SDValue Addr, SDValue &VAddr,
146 SDValue &Offset, SDValue &SLC) const;
147 bool SelectFlatAtomicSigned(SDValue Addr, SDValue &VAddr,
148 SDValue &Offset, SDValue &SLC) const;
151 bool SelectFlatOffset(SDValue Addr, SDValue &VAddr,
152 SDValue &Offset, SDValue &SLC) const;
154 bool SelectSMRDOffset(SDValue ByteOffsetNode, SDValue &Offset,
156 SDValue Expand32BitAddress(SDValue Addr) const;
157 bool SelectSMRD(SDValue Addr, SDValue &SBase, SDValue &Offset,
159 bool SelectSMRDImm(SDValue Addr, SDValue &SBase, SDValue &Offset) const;
160 bool SelectSMRDImm32(SDValue Addr, SDValue &SBase, SDValue &Offset) const;
161 bool SelectSMRDSgpr(SDValue Addr, SDValue &SBase, SDValue &Offset) const;
162 bool SelectSMRDBufferImm(SDValue Addr, SDValue &Offset) const;
163 bool SelectSMRDBufferImm32(SDValue Addr, SDValue &Offset) const;
164 bool SelectMOVRELOffset(SDValue Index, SDValue &Base, SDValue &Offset) const;
166 bool SelectVOP3Mods_NNaN(SDValue In, SDValue &Src, SDValue &SrcMods) const;
167 bool SelectVOP3ModsImpl(SDValue In, SDValue &Src, unsigned &SrcMods) const;
168 bool SelectVOP3Mods(SDValue In, SDValue &Src, SDValue &SrcMods) const;
169 bool SelectVOP3NoMods(SDValue In, SDValue &Src) const;
170 bool SelectVOP3Mods0(SDValue In, SDValue &Src, SDValue &SrcMods,
171 SDValue &Clamp, SDValue &Omod) const;
172 bool SelectVOP3NoMods0(SDValue In, SDValue &Src, SDValue &SrcMods,
173 SDValue &Clamp, SDValue &Omod) const;
175 bool SelectVOP3Mods0Clamp0OMod(SDValue In, SDValue &Src, SDValue &SrcMods,
176 SDValue &Clamp,
177 SDValue &Omod) const;
179 bool SelectVOP3OMods(SDValue In, SDValue &Src,
180 SDValue &Clamp, SDValue &Omod) const;
182 bool SelectVOP3PMods(SDValue In, SDValue &Src, SDValue &SrcMods) const;
183 bool SelectVOP3PMods0(SDValue In, SDValue &Src, SDValue &SrcMods,
184 SDValue &Clamp) const;
186 bool SelectVOP3OpSel(SDValue In, SDValue &Src, SDValue &SrcMods) const;
187 bool SelectVOP3OpSel0(SDValue In, SDValue &Src, SDValue &SrcMods,
188 SDValue &Clamp) const;
190 bool SelectVOP3OpSelMods(SDValue In, SDValue &Src, SDValue &SrcMods) const;
191 bool SelectVOP3OpSelMods0(SDValue In, SDValue &Src, SDValue &SrcMods,
192 SDValue &Clamp) const;
193 bool SelectVOP3PMadMixModsImpl(SDValue In, SDValue &Src, unsigned &Mods) const;
194 bool SelectVOP3PMadMixMods(SDValue In, SDValue &Src, SDValue &SrcMods) const;
196 bool SelectHi16Elt(SDValue In, SDValue &Src) const;
205 SDNode *getS_BFE(unsigned Opcode, const SDLoc &DL, SDValue Val,
223 bool SelectGlobalValueConstantOffset(SDValue Addr, SDValue& IntPtr);
224 bool SelectGlobalValueVariableOffset(SDValue Addr, SDValue &BaseReg,
225 SDValue& Offset);
232 bool SelectADDRIndirect(SDValue Addr, SDValue &Base,
233 SDValue &Offset) override;
234 bool SelectADDRVTX_READ(SDValue Addr, SDValue &Base,
235 SDValue &Offset) override;
272 bool AMDGPUDAGToDAGISel::isNoNanSrc(SDValue N) const { in isNoNanSrc()
335 SDValue SubRegOp = N->getOperand(OpNo + 1); in getOperandRegClass()
353 SDValue M0 = Lowering.copyToM0(*CurDAG, CurDAG->getEntryNode(), SDLoc(N), in glueCopyToM0()
356 SDValue Glue = M0.getValue(1); in glueCopyToM0()
358 SmallVector <SDValue, 8> Ops; in glueCopyToM0()
374 const SDValue Ops[] = { in buildSMovImm64()
376 SDValue(Lo, 0), CurDAG->getTargetConstant(AMDGPU::sub0, DL, MVT::i32), in buildSMovImm64()
377 SDValue(Hi, 0), CurDAG->getTargetConstant(AMDGPU::sub1, DL, MVT::i32)}; in buildSMovImm64()
399 static bool getConstantValue(SDValue N, uint32_t &Out) { in getConstantValue()
418 SDValue RegClass = CurDAG->getTargetConstant(RegClassID, DL, MVT::i32); in SelectBuildVector()
431 SmallVector<SDValue, 16 * 2 + 1> RegSeqArgs(NumVectorElts * 2 + 1); in SelectBuildVector()
453 RegSeqArgs[1 + (2 * i)] = SDValue(ImpDef, 0); in SelectBuildVector()
533 SDValue RC, SubReg0, SubReg1; in Select()
546 const SDValue Ops[] = { RC, N->getOperand(0), SubReg0, in Select()
673 bool AMDGPUDAGToDAGISel::SelectADDRVTX_READ(SDValue Addr, SDValue &Base, in SelectADDRVTX_READ()
674 SDValue &Offset) { in SelectADDRVTX_READ()
678 bool AMDGPUDAGToDAGISel::SelectADDRIndirect(SDValue Addr, SDValue &Base, in SelectADDRIndirect()
679 SDValue &Offset) { in SelectADDRIndirect()
705 SDValue LHS = N->getOperand(0); in SelectADD_SUB_I64()
706 SDValue RHS = N->getOperand(1); in SelectADD_SUB_I64()
714 SDValue Sub0 = CurDAG->getTargetConstant(AMDGPU::sub0, DL, MVT::i32); in SelectADD_SUB_I64()
715 SDValue Sub1 = CurDAG->getTargetConstant(AMDGPU::sub1, DL, MVT::i32); in SelectADD_SUB_I64()
734 SDValue Args[] = { SDValue(Lo0, 0), SDValue(Lo1, 0) }; in SelectADD_SUB_I64()
737 SDValue Args[] = { SDValue(Lo0, 0), SDValue(Lo1, 0), N->getOperand(2) }; in SelectADD_SUB_I64()
740 SDValue AddHiArgs[] = { in SelectADD_SUB_I64()
741 SDValue(Hi0, 0), in SelectADD_SUB_I64()
742 SDValue(Hi1, 0), in SelectADD_SUB_I64()
743 SDValue(AddLo, 1) in SelectADD_SUB_I64()
747 SDValue RegSequenceArgs[] = { in SelectADD_SUB_I64()
749 SDValue(AddLo,0), in SelectADD_SUB_I64()
751 SDValue(AddHi,0), in SelectADD_SUB_I64()
759 ReplaceUses(SDValue(N, 1), SDValue(AddHi, 1)); in SelectADD_SUB_I64()
780 SDValue Ops[10]; in SelectFMA_W_CHAIN()
794 SDValue Ops[8]; in SelectFMUL_W_CHAIN()
815 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), N->getOperand(2) }; in SelectDIV_SCALE()
826 SDValue Clamp = CurDAG->getTargetConstant(0, SL, MVT::i1); in SelectMAD_64_32()
827 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), N->getOperand(2), in SelectMAD_64_32()
832 bool AMDGPUDAGToDAGISel::isDSOffsetLegal(const SDValue &Base, unsigned Offset, in isDSOffsetLegal()
847 bool AMDGPUDAGToDAGISel::SelectDS1Addr1Offset(SDValue Addr, SDValue &Base, in SelectDS1Addr1Offset()
848 SDValue &Offset) const { in SelectDS1Addr1Offset()
851 SDValue N0 = Addr.getOperand(0); in SelectDS1Addr1Offset()
852 SDValue N1 = Addr.getOperand(1); in SelectDS1Addr1Offset()
865 SDValue Zero = CurDAG->getTargetConstant(0, DL, MVT::i32); in SelectDS1Addr1Offset()
870 SDValue Sub = CurDAG->getNode(ISD::SUB, DL, MVT::i32, in SelectDS1Addr1Offset()
882 Base = SDValue(MachineSub, 0); in SelectDS1Addr1Offset()
897 SDValue Zero = CurDAG->getTargetConstant(0, DL, MVT::i32); in SelectDS1Addr1Offset()
900 Base = SDValue(MovZero, 0); in SelectDS1Addr1Offset()
913 bool AMDGPUDAGToDAGISel::SelectDS64Bit4ByteAligned(SDValue Addr, SDValue &Base, in SelectDS64Bit4ByteAligned()
914 SDValue &Offset0, in SelectDS64Bit4ByteAligned()
915 SDValue &Offset1) const { in SelectDS64Bit4ByteAligned()
919 SDValue N0 = Addr.getOperand(0); in SelectDS64Bit4ByteAligned()
920 SDValue N1 = Addr.getOperand(1); in SelectDS64Bit4ByteAligned()
939 SDValue Zero = CurDAG->getTargetConstant(0, DL, MVT::i32); in SelectDS64Bit4ByteAligned()
944 SDValue Sub = CurDAG->getNode(ISD::SUB, DL, MVT::i32, in SelectDS64Bit4ByteAligned()
955 Base = SDValue(MachineSub, 0); in SelectDS64Bit4ByteAligned()
968 SDValue Zero = CurDAG->getTargetConstant(0, DL, MVT::i32); in SelectDS64Bit4ByteAligned()
972 Base = SDValue(MovZero, 0); in SelectDS64Bit4ByteAligned()
987 bool AMDGPUDAGToDAGISel::SelectMUBUF(SDValue Addr, SDValue &Ptr, in SelectMUBUF()
988 SDValue &VAddr, SDValue &SOffset, in SelectMUBUF()
989 SDValue &Offset, SDValue &Offen, in SelectMUBUF()
990 SDValue &Idxen, SDValue &Addr64, in SelectMUBUF()
991 SDValue &GLC, SDValue &SLC, in SelectMUBUF()
992 SDValue &TFE) const { in SelectMUBUF()
1011 SDValue N0 = Addr; in SelectMUBUF()
1023 SDValue N2 = N0.getOperand(0); in SelectMUBUF()
1024 SDValue N3 = N0.getOperand(1); in SelectMUBUF()
1031 Ptr = SDValue(buildSMovImm64(DL, 0, MVT::v2i32), 0); in SelectMUBUF()
1047 Ptr = SDValue(buildSMovImm64(DL, 0, MVT::v2i32), 0); in SelectMUBUF()
1072 SDValue(CurDAG->getMachineNode( in SelectMUBUF()
1079 bool AMDGPUDAGToDAGISel::SelectMUBUFAddr64(SDValue Addr, SDValue &SRsrc, in SelectMUBUFAddr64()
1080 SDValue &VAddr, SDValue &SOffset, in SelectMUBUFAddr64()
1081 SDValue &Offset, SDValue &GLC, in SelectMUBUFAddr64()
1082 SDValue &SLC, SDValue &TFE) const { in SelectMUBUFAddr64()
1083 SDValue Ptr, Offen, Idxen, Addr64; in SelectMUBUFAddr64()
1100 SRsrc = SDValue(Lowering.wrapAddr64Rsrc(*CurDAG, DL, Ptr), 0); in SelectMUBUFAddr64()
1107 bool AMDGPUDAGToDAGISel::SelectMUBUFAddr64(SDValue Addr, SDValue &SRsrc, in SelectMUBUFAddr64()
1108 SDValue &VAddr, SDValue &SOffset, in SelectMUBUFAddr64()
1109 SDValue &Offset, in SelectMUBUFAddr64()
1110 SDValue &SLC) const { in SelectMUBUFAddr64()
1112 SDValue GLC, TFE; in SelectMUBUFAddr64()
1122 std::pair<SDValue, SDValue> AMDGPUDAGToDAGISel::foldFrameIndex(SDValue N) const { in foldFrameIndex()
1127 SDValue TFI = CurDAG->getTargetFrameIndex(FI->getIndex(), in foldFrameIndex()
1143 SDValue Addr, SDValue &Rsrc, in SelectMUBUFScratchOffen()
1144 SDValue &VAddr, SDValue &SOffset, in SelectMUBUFScratchOffen()
1145 SDValue &ImmOffset) const { in SelectMUBUFScratchOffen()
1156 SDValue HighBits = CurDAG->getTargetConstant(Imm & ~4095, DL, MVT::i32); in SelectMUBUFScratchOffen()
1159 VAddr = SDValue(MovHighBits, 0); in SelectMUBUFScratchOffen()
1175 SDValue N0 = Addr.getOperand(0); in SelectMUBUFScratchOffen()
1176 SDValue N1 = Addr.getOperand(1); in SelectMUBUFScratchOffen()
1210 SDValue Addr, in SelectMUBUFScratchOffset()
1211 SDValue &SRsrc, in SelectMUBUFScratchOffset()
1212 SDValue &SOffset, in SelectMUBUFScratchOffset()
1213 SDValue &Offset) const { in SelectMUBUFScratchOffset()
1236 bool AMDGPUDAGToDAGISel::SelectMUBUFOffset(SDValue Addr, SDValue &SRsrc, in SelectMUBUFOffset()
1237 SDValue &SOffset, SDValue &Offset, in SelectMUBUFOffset()
1238 SDValue &GLC, SDValue &SLC, in SelectMUBUFOffset()
1239 SDValue &TFE) const { in SelectMUBUFOffset()
1240 SDValue Ptr, VAddr, Offen, Idxen, Addr64; in SelectMUBUFOffset()
1258 SRsrc = SDValue(Lowering.buildRSRC(*CurDAG, DL, Ptr, 0, Rsrc), 0); in SelectMUBUFOffset()
1264 bool AMDGPUDAGToDAGISel::SelectMUBUFOffset(SDValue Addr, SDValue &SRsrc, in SelectMUBUFOffset()
1265 SDValue &Soffset, SDValue &Offset in SelectMUBUFOffset()
1267 SDValue GLC, SLC, TFE; in SelectMUBUFOffset()
1271 bool AMDGPUDAGToDAGISel::SelectMUBUFOffset(SDValue Addr, SDValue &SRsrc, in SelectMUBUFOffset()
1272 SDValue &Soffset, SDValue &Offset, in SelectMUBUFOffset()
1273 SDValue &SLC) const { in SelectMUBUFOffset()
1274 SDValue GLC, TFE; in SelectMUBUFOffset()
1280 bool AMDGPUDAGToDAGISel::SelectFlatOffset(SDValue Addr, in SelectFlatOffset()
1281 SDValue &VAddr, in SelectFlatOffset()
1282 SDValue &Offset, in SelectFlatOffset()
1283 SDValue &SLC) const { in SelectFlatOffset()
1288 SDValue N0 = Addr.getOperand(0); in SelectFlatOffset()
1289 SDValue N1 = Addr.getOperand(1); in SelectFlatOffset()
1306 bool AMDGPUDAGToDAGISel::SelectFlatAtomic(SDValue Addr, in SelectFlatAtomic()
1307 SDValue &VAddr, in SelectFlatAtomic()
1308 SDValue &Offset, in SelectFlatAtomic()
1309 SDValue &SLC) const { in SelectFlatAtomic()
1313 bool AMDGPUDAGToDAGISel::SelectFlatAtomicSigned(SDValue Addr, in SelectFlatAtomicSigned()
1314 SDValue &VAddr, in SelectFlatAtomicSigned()
1315 SDValue &Offset, in SelectFlatAtomicSigned()
1316 SDValue &SLC) const { in SelectFlatAtomicSigned()
1320 bool AMDGPUDAGToDAGISel::SelectSMRDOffset(SDValue ByteOffsetNode, in SelectSMRDOffset()
1321 SDValue &Offset, bool &Imm) const { in SelectSMRDOffset()
1346 SDValue C32Bit = CurDAG->getTargetConstant(ByteOffset, SL, MVT::i32); in SelectSMRDOffset()
1347 Offset = SDValue(CurDAG->getMachineNode(AMDGPU::S_MOV_B32, SL, MVT::i32, in SelectSMRDOffset()
1354 SDValue AMDGPUDAGToDAGISel::Expand32BitAddress(SDValue Addr) const { in Expand32BitAddress()
1364 SDValue AddrHi = CurDAG->getTargetConstant(AddrHiVal, SL, MVT::i32); in Expand32BitAddress()
1366 const SDValue Ops[] = { in Expand32BitAddress()
1370 SDValue(CurDAG->getMachineNode(AMDGPU::S_MOV_B32, SL, MVT::i32, AddrHi), in Expand32BitAddress()
1375 return SDValue(CurDAG->getMachineNode(AMDGPU::REG_SEQUENCE, SL, MVT::i64, in Expand32BitAddress()
1379 bool AMDGPUDAGToDAGISel::SelectSMRD(SDValue Addr, SDValue &SBase, in SelectSMRD()
1380 SDValue &Offset, bool &Imm) const { in SelectSMRD()
1388 SDValue N0 = Addr.getOperand(0); in SelectSMRD()
1389 SDValue N1 = Addr.getOperand(1); in SelectSMRD()
1402 bool AMDGPUDAGToDAGISel::SelectSMRDImm(SDValue Addr, SDValue &SBase, in SelectSMRDImm()
1403 SDValue &Offset) const { in SelectSMRDImm()
1408 bool AMDGPUDAGToDAGISel::SelectSMRDImm32(SDValue Addr, SDValue &SBase, in SelectSMRDImm32()
1409 SDValue &Offset) const { in SelectSMRDImm32()
1421 bool AMDGPUDAGToDAGISel::SelectSMRDSgpr(SDValue Addr, SDValue &SBase, in SelectSMRDSgpr()
1422 SDValue &Offset) const { in SelectSMRDSgpr()
1428 bool AMDGPUDAGToDAGISel::SelectSMRDBufferImm(SDValue Addr, in SelectSMRDBufferImm()
1429 SDValue &Offset) const { in SelectSMRDBufferImm()
1434 bool AMDGPUDAGToDAGISel::SelectSMRDBufferImm32(SDValue Addr, in SelectSMRDBufferImm32()
1435 SDValue &Offset) const { in SelectSMRDBufferImm32()
1446 bool AMDGPUDAGToDAGISel::SelectMOVRELOffset(SDValue Index, in SelectMOVRELOffset()
1447 SDValue &Base, in SelectMOVRELOffset()
1448 SDValue &Offset) const { in SelectMOVRELOffset()
1452 SDValue N0 = Index.getOperand(0); in SelectMOVRELOffset()
1453 SDValue N1 = Index.getOperand(1); in SelectMOVRELOffset()
1475 SDValue Val, uint32_t Offset, in getS_BFE()
1481 SDValue PackedConst = CurDAG->getTargetConstant(PackedVal, DL, MVT::i32); in getS_BFE()
1491 const SDValue &Shl = N->getOperand(0); in SelectS_BFEFromShifts()
1517 const SDValue &Srl = N->getOperand(0); in SelectS_BFE()
1539 const SDValue &And = N->getOperand(0); in SelectS_BFE()
1569 SDValue Src = N->getOperand(0); in SelectS_BFE()
1592 SDValue Cond = N->getOperand(1); in isCBranchSCC()
1614 SDValue Cond = N->getOperand(1); in SelectBRCOND()
1641 Cond = SDValue(CurDAG->getMachineNode(AMDGPU::S_AND_B64, SL, MVT::i1, in SelectBRCOND()
1647 SDValue VCC = CurDAG->getCopyToReg(N->getOperand(0), SL, CondReg, Cond); in SelectBRCOND()
1664 SDValue Src0 = N->getOperand(0); in SelectFMAD_FMA()
1665 SDValue Src1 = N->getOperand(1); in SelectFMAD_FMA()
1666 SDValue Src2 = N->getOperand(2); in SelectFMAD_FMA()
1682 SDValue Zero = CurDAG->getTargetConstant(0, SDLoc(), MVT::i32); in SelectFMAD_FMA()
1683 SDValue Ops[] = { in SelectFMAD_FMA()
1715 SDValue SRsrc, VAddr, SOffset, Offset, SLC; in SelectATOMIC_CMP_SWAP()
1720 SDValue CmpVal = Mem->getOperand(2); in SelectATOMIC_CMP_SWAP()
1724 SDValue Ops[] = { in SelectATOMIC_CMP_SWAP()
1733 SDValue SRsrc, SOffset, Offset, SLC; in SelectATOMIC_CMP_SWAP()
1738 SDValue CmpVal = Mem->getOperand(2); in SelectATOMIC_CMP_SWAP()
1739 SDValue Ops[] = { in SelectATOMIC_CMP_SWAP()
1756 SDValue Extract in SelectATOMIC_CMP_SWAP()
1757 = CurDAG->getTargetExtractSubreg(SubReg, SL, VT, SDValue(CmpSwap, 0)); in SelectATOMIC_CMP_SWAP()
1759 ReplaceUses(SDValue(N, 0), Extract); in SelectATOMIC_CMP_SWAP()
1760 ReplaceUses(SDValue(N, 1), SDValue(CmpSwap, 1)); in SelectATOMIC_CMP_SWAP()
1764 bool AMDGPUDAGToDAGISel::SelectVOP3ModsImpl(SDValue In, SDValue &Src, in SelectVOP3ModsImpl()
1782 bool AMDGPUDAGToDAGISel::SelectVOP3Mods(SDValue In, SDValue &Src, in SelectVOP3Mods()
1783 SDValue &SrcMods) const { in SelectVOP3Mods()
1793 bool AMDGPUDAGToDAGISel::SelectVOP3Mods_NNaN(SDValue In, SDValue &Src, in SelectVOP3Mods_NNaN()
1794 SDValue &SrcMods) const { in SelectVOP3Mods_NNaN()
1799 bool AMDGPUDAGToDAGISel::SelectVOP3NoMods(SDValue In, SDValue &Src) const { in SelectVOP3NoMods()
1807 bool AMDGPUDAGToDAGISel::SelectVOP3Mods0(SDValue In, SDValue &Src, in SelectVOP3Mods0()
1808 SDValue &SrcMods, SDValue &Clamp, in SelectVOP3Mods0()
1809 SDValue &Omod) const { in SelectVOP3Mods0()
1817 bool AMDGPUDAGToDAGISel::SelectVOP3Mods0Clamp0OMod(SDValue In, SDValue &Src, in SelectVOP3Mods0Clamp0OMod()
1818 SDValue &SrcMods, in SelectVOP3Mods0Clamp0OMod()
1819 SDValue &Clamp, in SelectVOP3Mods0Clamp0OMod()
1820 SDValue &Omod) const { in SelectVOP3Mods0Clamp0OMod()
1825 bool AMDGPUDAGToDAGISel::SelectVOP3OMods(SDValue In, SDValue &Src, in SelectVOP3OMods()
1826 SDValue &Clamp, SDValue &Omod) const { in SelectVOP3OMods()
1836 static SDValue stripBitcast(SDValue Val) { in stripBitcast()
1841 static bool isExtractHiElt(SDValue In, SDValue &Out) { in isExtractHiElt()
1846 SDValue Srl = In.getOperand(0); in isExtractHiElt()
1861 static SDValue stripExtractLoElt(SDValue In) { in stripExtractLoElt()
1863 SDValue Src = In.getOperand(0); in stripExtractLoElt()
1871 bool AMDGPUDAGToDAGISel::SelectVOP3PMods(SDValue In, SDValue &Src, in SelectVOP3PMods()
1872 SDValue &SrcMods) const { in SelectVOP3PMods()
1884 SDValue Lo = stripBitcast(Src.getOperand(0)); in SelectVOP3PMods()
1885 SDValue Hi = stripBitcast(Src.getOperand(1)); in SelectVOP3PMods()
1925 bool AMDGPUDAGToDAGISel::SelectVOP3PMods0(SDValue In, SDValue &Src, in SelectVOP3PMods0()
1926 SDValue &SrcMods, in SelectVOP3PMods0()
1927 SDValue &Clamp) const { in SelectVOP3PMods0()
1936 bool AMDGPUDAGToDAGISel::SelectVOP3OpSel(SDValue In, SDValue &Src, in SelectVOP3OpSel()
1937 SDValue &SrcMods) const { in SelectVOP3OpSel()
1944 bool AMDGPUDAGToDAGISel::SelectVOP3OpSel0(SDValue In, SDValue &Src, in SelectVOP3OpSel0()
1945 SDValue &SrcMods, in SelectVOP3OpSel0()
1946 SDValue &Clamp) const { in SelectVOP3OpSel0()
1955 bool AMDGPUDAGToDAGISel::SelectVOP3OpSelMods(SDValue In, SDValue &Src, in SelectVOP3OpSelMods()
1956 SDValue &SrcMods) const { in SelectVOP3OpSelMods()
1961 bool AMDGPUDAGToDAGISel::SelectVOP3OpSelMods0(SDValue In, SDValue &Src, in SelectVOP3OpSelMods0()
1962 SDValue &SrcMods, in SelectVOP3OpSelMods0()
1963 SDValue &Clamp) const { in SelectVOP3OpSelMods0()
1974 bool AMDGPUDAGToDAGISel::SelectVOP3PMadMixModsImpl(SDValue In, SDValue &Src, in SelectVOP3PMadMixModsImpl()
2015 bool AMDGPUDAGToDAGISel::SelectVOP3PMadMixMods(SDValue In, SDValue &Src, in SelectVOP3PMadMixMods()
2016 SDValue &SrcMods) const { in SelectVOP3PMadMixMods()
2024 bool AMDGPUDAGToDAGISel::SelectHi16Elt(SDValue In, SDValue &Src) const { in SelectHi16Elt()
2032 SDValue K = CurDAG->getTargetConstant(C->getZExtValue() << 16, SL, MVT::i32); in SelectHi16Elt()
2035 Src = SDValue(MovK, 0); in SelectHi16Elt()
2041 SDValue K = CurDAG->getTargetConstant( in SelectHi16Elt()
2045 Src = SDValue(MovK, 0); in SelectHi16Elt()
2167 bool R600DAGToDAGISel::SelectGlobalValueConstantOffset(SDValue Addr, in SelectGlobalValueConstantOffset()
2168 SDValue& IntPtr) { in SelectGlobalValueConstantOffset()
2177 bool R600DAGToDAGISel::SelectGlobalValueVariableOffset(SDValue Addr, in SelectGlobalValueVariableOffset()
2178 SDValue& BaseReg, SDValue &Offset) { in SelectGlobalValueVariableOffset()
2224 bool R600DAGToDAGISel::SelectADDRIndirect(SDValue Addr, SDValue &Base, in SelectADDRIndirect()
2225 SDValue &Offset) { in SelectADDRIndirect()
2248 bool R600DAGToDAGISel::SelectADDRVTX_READ(SDValue Addr, SDValue &Base, in SelectADDRVTX_READ()
2249 SDValue &Offset) { in SelectADDRVTX_READ()