57   OS << getRegisterName(RegNo);  in printRegName()
109         O << '\t' << AsmMnemonic << '\t' << getRegisterName(Op0.getReg())  in printInst()
110           << ", " << getRegisterName(getWRegFromXReg(Op1.getReg()));  in printInst()
145         O << '\t' << AsmMnemonic << '\t' << getRegisterName(Op0.getReg())  in printInst()
146           << ", " << getRegisterName(Op1.getReg()) << ", #" << shift;  in printInst()
155         << getRegisterName(Op0.getReg()) << ", " << getRegisterName(Op1.getReg())  in printInst()
163       << getRegisterName(Op0.getReg()) << ", " << getRegisterName(Op1.getReg())  in printInst()
182       O << "\tbfc\t" << getRegisterName(Op0.getReg())  in printInst()
192       O << "\tbfi\t" << getRegisterName(Op0.getReg()) << ", "  in printInst()
193         << getRegisterName(Op2.getReg()) << ", #" << LSB << ", #" << Width;  in printInst()
202       << getRegisterName(Op0.getReg()) << ", " << getRegisterName(Op2.getReg())  in printInst()
219     O << getRegisterName(MI->getOperand(0).getReg()) << ", #";  in printInst()
226     O << "\tmovk\t" << getRegisterName(MI->getOperand(0).getReg()) << ", #";  in printInst()
244       O << "\tmov\t" << getRegisterName(MI->getOperand(0).getReg()) << ", #"  in printInst()
259       O << "\tmov\t" << getRegisterName(MI->getOperand(0).getReg()) << ", #"  in printInst()
273       O << "\tmov\t" << getRegisterName(MI->getOperand(0).getReg()) << ", #"  in printInst()
704       << getRegisterName(MI->getOperand(0).getReg(), AArch64::vreg) << ", ";  in printInst()
710       << getRegisterName(MI->getOperand(ListOpNum + 1).getReg(), AArch64::vreg);  in printInst()
728     O << ", [" << getRegisterName(AddrReg) << ']';  in printInst()
734         O << ", " << getRegisterName(Reg);  in printInst()
856     O << ", " << getRegisterName(MI->getOperand(4).getReg());  in printSysAlias()
867     O << getRegisterName(Reg);  in printOperand()
898       O << getRegisterName(Reg);  in printPostIncOperand()
909   O << getRegisterName(Reg, AArch64::vreg);  in printVRegOperand()
966   O << getRegisterName(MI->getOperand(OpNum).getReg());  in printShiftedRegister()
973   O << getRegisterName(MI->getOperand(OpNum).getReg());  in printExtendedRegister()
1061   O << '[' << getRegisterName(MI->getOperand(OpNum).getReg()) << ']';  in printAMNoIndex()
1085   O << '[' << getRegisterName(MI->getOperand(OpNum).getReg());  in printAMIndexedWB()
1241   O << getRegisterName(Even) << ", " << getRegisterName(Odd);  in printGPRSeqPairsClassOperand()
1286       O << getRegisterName(Reg) << LayoutSuffix;  in printVectorList()
1288       O << getRegisterName(Reg, AArch64::vreg) << LayoutSuffix;  in printVectorList()
1482   O << getRegisterName(Reg);  in printSVERegOp()
1564   O << getRegisterName(Reg - AArch64::Z0 + Base);  in printZPRasFPR()
1581   O << getRegisterName(getWRegFromXReg(Reg));  in printGPR64as32()