Lines Matching refs:OpNum
720 int OpNum = LdStDesc->ListOperand; in printInst() local
721 printVectorList(MI, OpNum++, STI, O, ""); in printInst()
724 O << '[' << MI->getOperand(OpNum++).getImm() << ']'; in printInst()
727 unsigned AddrReg = MI->getOperand(OpNum++).getReg(); in printInst()
732 unsigned Reg = MI->getOperand(OpNum++).getReg(); in printInst()
920 void AArch64InstPrinter::printAddSubImm(const MCInst *MI, unsigned OpNum, in printAddSubImm() argument
923 const MCOperand &MO = MI->getOperand(OpNum); in printAddSubImm()
928 AArch64_AM::getShiftValue(MI->getOperand(OpNum + 1).getImm()); in printAddSubImm()
931 printShifter(MI, OpNum + 1, STI, O); in printAddSubImm()
938 printShifter(MI, OpNum + 1, STI, O); in printAddSubImm()
943 void AArch64InstPrinter::printLogicalImm(const MCInst *MI, unsigned OpNum, in printLogicalImm() argument
946 uint64_t Val = MI->getOperand(OpNum).getImm(); in printLogicalImm()
951 void AArch64InstPrinter::printShifter(const MCInst *MI, unsigned OpNum, in printShifter() argument
954 unsigned Val = MI->getOperand(OpNum).getImm(); in printShifter()
963 void AArch64InstPrinter::printShiftedRegister(const MCInst *MI, unsigned OpNum, in printShiftedRegister() argument
966 O << getRegisterName(MI->getOperand(OpNum).getReg()); in printShiftedRegister()
967 printShifter(MI, OpNum + 1, STI, O); in printShiftedRegister()
970 void AArch64InstPrinter::printExtendedRegister(const MCInst *MI, unsigned OpNum, in printExtendedRegister() argument
973 O << getRegisterName(MI->getOperand(OpNum).getReg()); in printExtendedRegister()
974 printArithExtend(MI, OpNum + 1, STI, O); in printExtendedRegister()
977 void AArch64InstPrinter::printArithExtend(const MCInst *MI, unsigned OpNum, in printArithExtend() argument
980 unsigned Val = MI->getOperand(OpNum).getImm(); in printArithExtend()
1018 void AArch64InstPrinter::printMemExtend(const MCInst *MI, unsigned OpNum, in printMemExtend() argument
1021 bool SignExtend = MI->getOperand(OpNum).getImm(); in printMemExtend()
1022 bool DoShift = MI->getOperand(OpNum + 1).getImm(); in printMemExtend()
1028 unsigned OpNum, in printRegWithShiftExtend() argument
1031 printOperand(MI, OpNum, STI, O); in printRegWithShiftExtend()
1044 void AArch64InstPrinter::printCondCode(const MCInst *MI, unsigned OpNum, in printCondCode() argument
1047 AArch64CC::CondCode CC = (AArch64CC::CondCode)MI->getOperand(OpNum).getImm(); in printCondCode()
1051 void AArch64InstPrinter::printInverseCondCode(const MCInst *MI, unsigned OpNum, in printInverseCondCode() argument
1054 AArch64CC::CondCode CC = (AArch64CC::CondCode)MI->getOperand(OpNum).getImm(); in printInverseCondCode()
1058 void AArch64InstPrinter::printAMNoIndex(const MCInst *MI, unsigned OpNum, in printAMNoIndex() argument
1061 O << '[' << getRegisterName(MI->getOperand(OpNum).getReg()) << ']'; in printAMNoIndex()
1065 void AArch64InstPrinter::printImmScale(const MCInst *MI, unsigned OpNum, in printImmScale() argument
1068 O << '#' << formatImm(Scale * MI->getOperand(OpNum).getImm()); in printImmScale()
1071 void AArch64InstPrinter::printUImm12Offset(const MCInst *MI, unsigned OpNum, in printUImm12Offset() argument
1073 const MCOperand MO = MI->getOperand(OpNum); in printUImm12Offset()
1082 void AArch64InstPrinter::printAMIndexedWB(const MCInst *MI, unsigned OpNum, in printAMIndexedWB() argument
1084 const MCOperand MO1 = MI->getOperand(OpNum + 1); in printAMIndexedWB()
1085 O << '[' << getRegisterName(MI->getOperand(OpNum).getReg()); in printAMIndexedWB()
1097 void AArch64InstPrinter::printPrefetchOp(const MCInst *MI, unsigned OpNum, in printPrefetchOp() argument
1100 unsigned prfop = MI->getOperand(OpNum).getImm(); in printPrefetchOp()
1114 void AArch64InstPrinter::printPSBHintOp(const MCInst *MI, unsigned OpNum, in printPSBHintOp() argument
1117 unsigned psbhintop = MI->getOperand(OpNum).getImm(); in printPSBHintOp()
1125 void AArch64InstPrinter::printBTIHintOp(const MCInst *MI, unsigned OpNum, in printBTIHintOp() argument
1128 unsigned btihintop = (MI->getOperand(OpNum).getImm() ^ 32) >> 1; in printBTIHintOp()
1136 void AArch64InstPrinter::printFPImmOperand(const MCInst *MI, unsigned OpNum, in printFPImmOperand() argument
1139 const MCOperand &MO = MI->getOperand(OpNum); in printFPImmOperand()
1229 unsigned OpNum, in printGPRSeqPairsClassOperand() argument
1234 unsigned Reg = MI->getOperand(OpNum).getReg(); in printGPRSeqPairsClassOperand()
1244 void AArch64InstPrinter::printVectorList(const MCInst *MI, unsigned OpNum, in printVectorList() argument
1248 unsigned Reg = MI->getOperand(OpNum).getReg(); in printVectorList()
1299 unsigned OpNum, in printImplicitlyTypedVectorList() argument
1302 printVectorList(MI, OpNum, STI, O, ""); in printImplicitlyTypedVectorList()
1306 void AArch64InstPrinter::printTypedVectorList(const MCInst *MI, unsigned OpNum, in printTypedVectorList() argument
1315 printVectorList(MI, OpNum, STI, O, Suffix); in printTypedVectorList()
1318 void AArch64InstPrinter::printVectorIndex(const MCInst *MI, unsigned OpNum, in printVectorIndex() argument
1321 O << "[" << MI->getOperand(OpNum).getImm() << "]"; in printVectorIndex()
1324 void AArch64InstPrinter::printAlignedLabel(const MCInst *MI, unsigned OpNum, in printAlignedLabel() argument
1327 const MCOperand &Op = MI->getOperand(OpNum); in printAlignedLabel()
1338 dyn_cast<MCConstantExpr>(MI->getOperand(OpNum).getExpr()); in printAlignedLabel()
1345 MI->getOperand(OpNum).getExpr()->print(O, &MAI); in printAlignedLabel()
1349 void AArch64InstPrinter::printAdrpLabel(const MCInst *MI, unsigned OpNum, in printAdrpLabel() argument
1352 const MCOperand &Op = MI->getOperand(OpNum); in printAdrpLabel()
1362 MI->getOperand(OpNum).getExpr()->print(O, &MAI); in printAdrpLabel()
1456 void AArch64InstPrinter::printSVEPattern(const MCInst *MI, unsigned OpNum, in printSVEPattern() argument
1459 unsigned Val = MI->getOperand(OpNum).getImm(); in printSVEPattern()
1467 void AArch64InstPrinter::printSVERegOp(const MCInst *MI, unsigned OpNum, in printSVERegOp() argument
1481 unsigned Reg = MI->getOperand(OpNum).getReg(); in printSVERegOp()
1506 void AArch64InstPrinter::printImm8OptLsl(const MCInst *MI, unsigned OpNum, in printImm8OptLsl() argument
1509 unsigned UnscaledVal = MI->getOperand(OpNum).getImm(); in printImm8OptLsl()
1510 unsigned Shift = MI->getOperand(OpNum + 1).getImm(); in printImm8OptLsl()
1517 printShifter(MI, OpNum + 1, STI, O); in printImm8OptLsl()
1531 void AArch64InstPrinter::printSVELogicalImm(const MCInst *MI, unsigned OpNum, in printSVELogicalImm() argument
1537 uint64_t Val = MI->getOperand(OpNum).getImm(); in printSVELogicalImm()
1550 void AArch64InstPrinter::printZPRasFPR(const MCInst *MI, unsigned OpNum, in printZPRasFPR() argument
1563 unsigned Reg = MI->getOperand(OpNum).getReg(); in printZPRasFPR()
1568 void AArch64InstPrinter::printExactFPImm(const MCInst *MI, unsigned OpNum, in printExactFPImm() argument
1573 unsigned Val = MI->getOperand(OpNum).getImm(); in printExactFPImm()
1577 void AArch64InstPrinter::printGPR64as32(const MCInst *MI, unsigned OpNum, in printGPR64as32() argument
1580 unsigned Reg = MI->getOperand(OpNum).getReg(); in printGPR64as32()