169   for (MachineInstr &PredI : make_range(std::next(RIt), PredMBB->rend())) {  in knownRegValInBlock()
172     switch (PredI.getOpcode()) {  in knownRegValInBlock()
185       if (!PredI.getOperand(1).isReg())  in knownRegValInBlock()
187       MCPhysReg DstReg = PredI.getOperand(0).getReg();  in knownRegValInBlock()
188       MCPhysReg SrcReg = PredI.getOperand(1).getReg();  in knownRegValInBlock()
195       if (PredI.getOperand(2).isImm() && DomBBClobberedRegs.available(SrcReg) &&  in knownRegValInBlock()
198         int32_t KnownImm = PredI.getOperand(2).getImm();  in knownRegValInBlock()
199         int32_t Shift = PredI.getOperand(3).getImm();  in knownRegValInBlock()
203         FirstUse = PredI;  in knownRegValInBlock()
218       FirstUse = PredI;  in knownRegValInBlock()
253       MCPhysReg DstReg = PredI.getOperand(0).getReg();  in knownRegValInBlock()
263       FirstUse = PredI;  in knownRegValInBlock()
270     if (PredI.definesRegister(AArch64::NZCV))  in knownRegValInBlock()
274     LiveRegUnits::accumulateUsedDefed(PredI, DomBBClobberedRegs, DomBBUsedRegs,  in knownRegValInBlock()
320     for (auto PredI = Itr;; --PredI) {  in optimizeBlock()  local
321       if (FirstUse == PredI)  in optimizeBlock()
324       if (PredI->isCopy()) {  in optimizeBlock()
325         MCPhysReg CopyDstReg = PredI->getOperand(0).getReg();  in optimizeBlock()
326         MCPhysReg CopySrcReg = PredI->getOperand(1).getReg();  in optimizeBlock()
336               FirstUse = PredI;  in optimizeBlock()
345               FirstUse = PredI;  in optimizeBlock()
352       if (PredI == PredMBB->begin())  in optimizeBlock()
355       LiveRegUnits::accumulateUsedDefed(*PredI, OptBBClobberedRegs,  in optimizeBlock()