Lines Matching refs:TargetOpcode
238 case TargetOpcode::G_SHL: in selectBinaryOp()
240 case TargetOpcode::G_LSHR: in selectBinaryOp()
242 case TargetOpcode::G_ASHR: in selectBinaryOp()
249 case TargetOpcode::G_GEP: in selectBinaryOp()
251 case TargetOpcode::G_SHL: in selectBinaryOp()
253 case TargetOpcode::G_LSHR: in selectBinaryOp()
255 case TargetOpcode::G_ASHR: in selectBinaryOp()
266 case TargetOpcode::G_FADD: in selectBinaryOp()
268 case TargetOpcode::G_FSUB: in selectBinaryOp()
270 case TargetOpcode::G_FMUL: in selectBinaryOp()
272 case TargetOpcode::G_FDIV: in selectBinaryOp()
279 case TargetOpcode::G_FADD: in selectBinaryOp()
281 case TargetOpcode::G_FSUB: in selectBinaryOp()
283 case TargetOpcode::G_FMUL: in selectBinaryOp()
285 case TargetOpcode::G_FDIV: in selectBinaryOp()
287 case TargetOpcode::G_OR: in selectBinaryOp()
305 const bool isStore = GenericOpc == TargetOpcode::G_STORE; in selectLoadStoreUIOp()
343 BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(TargetOpcode::COPY)) in selectFP16CopyFromGPR32()
450 case TargetOpcode::G_SITOFP: in selectFPConvOpc()
452 case TargetOpcode::G_UITOFP: in selectFPConvOpc()
454 case TargetOpcode::G_FPTOSI: in selectFPConvOpc()
456 case TargetOpcode::G_FPTOUI: in selectFPConvOpc()
463 case TargetOpcode::G_SITOFP: in selectFPConvOpc()
465 case TargetOpcode::G_UITOFP: in selectFPConvOpc()
467 case TargetOpcode::G_FPTOSI: in selectFPConvOpc()
469 case TargetOpcode::G_FPTOUI: in selectFPConvOpc()
481 case TargetOpcode::G_SITOFP: in selectFPConvOpc()
483 case TargetOpcode::G_UITOFP: in selectFPConvOpc()
485 case TargetOpcode::G_FPTOSI: in selectFPConvOpc()
487 case TargetOpcode::G_FPTOUI: in selectFPConvOpc()
494 case TargetOpcode::G_SITOFP: in selectFPConvOpc()
496 case TargetOpcode::G_UITOFP: in selectFPConvOpc()
498 case TargetOpcode::G_FPTOSI: in selectFPConvOpc()
500 case TargetOpcode::G_FPTOUI: in selectFPConvOpc()
601 if (CCMI->getOpcode() == TargetOpcode::G_TRUNC) in selectCompareBranch()
603 if (CCMI->getOpcode() != TargetOpcode::G_ICMP) in selectCompareBranch()
723 if (!isPreISelGenericOpcode(Opcode) || Opcode == TargetOpcode::G_PHI) { in select()
726 if (Opcode == TargetOpcode::LOAD_STACK_GUARD) in select()
729 if (Opcode == TargetOpcode::PHI || Opcode == TargetOpcode::G_PHI) { in select()
754 I.setDesc(TII.get(TargetOpcode::PHI)); in select()
779 case TargetOpcode::G_BRCOND: { in select()
824 case TargetOpcode::G_BRINDIRECT: { in select()
829 case TargetOpcode::G_FCONSTANT: in select()
830 case TargetOpcode::G_CONSTANT: { in select()
831 const bool isFP = Opcode == TargetOpcode::G_FCONSTANT; in select()
919 case TargetOpcode::G_EXTRACT: { in select()
951 case TargetOpcode::G_INSERT: { in select()
985 case TargetOpcode::G_FRAME_INDEX: { in select()
1001 case TargetOpcode::G_GLOBAL_VALUE: { in select()
1029 case TargetOpcode::G_LOAD: in select()
1030 case TargetOpcode::G_STORE: { in select()
1070 if (PtrMI->getOpcode() == TargetOpcode::G_GEP) { in select()
1086 if (!Offset && PtrMI->getOpcode() == TargetOpcode::G_FRAME_INDEX) in select()
1093 if (*CVal == 0 && Opcode == TargetOpcode::G_STORE) { in select()
1104 case TargetOpcode::G_SMULH: in select()
1105 case TargetOpcode::G_UMULH: { in select()
1124 unsigned NewOpc = I.getOpcode() == TargetOpcode::G_SMULH ? AArch64::SMULHrr in select()
1132 case TargetOpcode::G_FADD: in select()
1133 case TargetOpcode::G_FSUB: in select()
1134 case TargetOpcode::G_FMUL: in select()
1135 case TargetOpcode::G_FDIV: in select()
1137 case TargetOpcode::G_OR: in select()
1138 case TargetOpcode::G_SHL: in select()
1139 case TargetOpcode::G_LSHR: in select()
1140 case TargetOpcode::G_ASHR: in select()
1141 case TargetOpcode::G_GEP: { in select()
1163 case TargetOpcode::G_PTR_MASK: { in select()
1174 case TargetOpcode::G_PTRTOINT: in select()
1175 case TargetOpcode::G_TRUNC: { in select()
1210 } else if (Opcode == TargetOpcode::G_TRUNC && DstTy == LLT::scalar(32) && in select()
1223 I.setDesc(TII.get(TargetOpcode::COPY)); in select()
1236 case TargetOpcode::G_ANYEXT: { in select()
1280 case TargetOpcode::G_ZEXT: in select()
1281 case TargetOpcode::G_SEXT: { in select()
1285 const bool isSigned = Opcode == TargetOpcode::G_SEXT; in select()
1336 case TargetOpcode::G_SITOFP: in select()
1337 case TargetOpcode::G_UITOFP: in select()
1338 case TargetOpcode::G_FPTOSI: in select()
1339 case TargetOpcode::G_FPTOUI: { in select()
1353 case TargetOpcode::G_INTTOPTR: in select()
1358 case TargetOpcode::G_BITCAST: in select()
1367 case TargetOpcode::G_SELECT: { in select()
1406 case TargetOpcode::G_ICMP: { in select()
1453 case TargetOpcode::G_FCMP: { in select()
1515 case TargetOpcode::G_VASTART: in select()
1518 case TargetOpcode::G_INTRINSIC_W_SIDE_EFFECTS: in select()
1527 case TargetOpcode::G_IMPLICIT_DEF: { in select()
1528 I.setDesc(TII.get(TargetOpcode::IMPLICIT_DEF)); in select()
1537 case TargetOpcode::G_BLOCK_ADDR: { in select()
1555 case TargetOpcode::G_BUILD_VECTOR: in select()
1557 case TargetOpcode::G_MERGE_VALUES: in select()
1572 TII.get(TargetOpcode::IMPLICIT_DEF)) in emitScalarToVector()
1577 TII.get(TargetOpcode::INSERT_SUBREG)) in emitScalarToVector()
1598 assert(I.getOpcode() == TargetOpcode::G_MERGE_VALUES && "unexpected opcode"); in selectMergeValues()
1615 TII.get(TargetOpcode::SUBREG_TO_REG)) in selectMergeValues()
1623 TII.get(TargetOpcode::SUBREG_TO_REG)) in selectMergeValues()
1644 assert(I.getOpcode() == TargetOpcode::G_BUILD_VECTOR); in selectBuildVector()
1692 TII.get(TargetOpcode::IMPLICIT_DEF)) in selectBuildVector()
1696 TII.get(TargetOpcode::INSERT_SUBREG)) in selectBuildVector()
1749 if (Def->getOpcode() != TargetOpcode::G_CONSTANT) in selectArithImmed()
1800 if (!RHS || RHS->getOpcode() != TargetOpcode::G_CONSTANT) in selectAddrModeUnscaled()
1837 if (RootDef->getOpcode() == TargetOpcode::G_FRAME_INDEX) { in selectAddrModeIndexed()
1853 if (LHSDef->getOpcode() == TargetOpcode::G_FRAME_INDEX) in selectAddrModeIndexed()
1881 assert(MI.getOpcode() == TargetOpcode::G_CONSTANT && "Expected G_CONSTANT"); in renderTruncImm()