2291     AddSubReg(MIB, SrcReg, Indices[SubReg], getKillRegState(KillSrc), TRI);  in copyPhysRegTuple()
2315     AddSubReg(MIB, SrcReg, Indices[SubReg], getKillRegState(KillSrc), TRI);  in copyGPRRegTuple()
2344             .addReg(SrcReg, RegState::Implicit | getKillRegState(KillSrc));  in copyPhysReg()
2347             .addReg(SrcReg, getKillRegState(KillSrc))  in copyPhysReg()
2369             .addReg(SrcReg, RegState::Implicit | getKillRegState(KillSrc));  in copyPhysReg()
2374             .addReg(SrcReg, getKillRegState(KillSrc));  in copyPhysReg()
2385           .addReg(SrcReg, getKillRegState(KillSrc))  in copyPhysReg()
2396           .addReg(SrcReg, getKillRegState(KillSrc));  in copyPhysReg()
2480           .addReg(SrcReg, getKillRegState(KillSrc));  in copyPhysReg()
2484           .addReg(SrcReg, getKillRegState(KillSrc))  in copyPhysReg()
2505           .addReg(SrcReg, getKillRegState(KillSrc));  in copyPhysReg()
2508           .addReg(SrcReg, getKillRegState(KillSrc));  in copyPhysReg()
2522           .addReg(SrcReg, getKillRegState(KillSrc));  in copyPhysReg()
2525           .addReg(SrcReg, getKillRegState(KillSrc));  in copyPhysReg()
2539           .addReg(SrcReg, getKillRegState(KillSrc));  in copyPhysReg()
2546           .addReg(SrcReg, getKillRegState(KillSrc));  in copyPhysReg()
2560           .addReg(SrcReg, getKillRegState(KillSrc));  in copyPhysReg()
2567           .addReg(SrcReg, getKillRegState(KillSrc));  in copyPhysReg()
2576         .addReg(SrcReg, getKillRegState(KillSrc));  in copyPhysReg()
2582         .addReg(SrcReg, getKillRegState(KillSrc));  in copyPhysReg()
2589         .addReg(SrcReg, getKillRegState(KillSrc));  in copyPhysReg()
2595         .addReg(SrcReg, getKillRegState(KillSrc));  in copyPhysReg()
2603         .addReg(SrcReg, getKillRegState(KillSrc))  in copyPhysReg()
2612         .addReg(AArch64::NZCV, RegState::Implicit | getKillRegState(KillSrc));  in copyPhysReg()
2635       .addReg(SrcReg0, getKillRegState(IsKill), SubIdx0)  in storeRegPairToStackSlot()
2636       .addReg(SrcReg1, getKillRegState(IsKill), SubIdx1)  in storeRegPairToStackSlot()
2740                                      .addReg(SrcReg, getKillRegState(isKill))  in storeRegToStackSlot()
4024               .addReg(SrcReg0, getKillRegState(Src0IsKill))  in genFusedMultiply()
4025               .addReg(SrcReg1, getKillRegState(Src1IsKill))  in genFusedMultiply()
4026               .addReg(SrcReg2, getKillRegState(Src2IsKill));  in genFusedMultiply()
4029               .addReg(SrcReg2, getKillRegState(Src2IsKill))  in genFusedMultiply()
4030               .addReg(SrcReg0, getKillRegState(Src0IsKill))  in genFusedMultiply()
4031               .addReg(SrcReg1, getKillRegState(Src1IsKill))  in genFusedMultiply()
4035               .addReg(SrcReg2, getKillRegState(Src2IsKill))  in genFusedMultiply()
4036               .addReg(SrcReg0, getKillRegState(Src0IsKill))  in genFusedMultiply()
4037               .addReg(SrcReg1, getKillRegState(Src1IsKill));  in genFusedMultiply()
4089           .addReg(SrcReg0, getKillRegState(Src0IsKill))  in genMaddR()
4090           .addReg(SrcReg1, getKillRegState(Src1IsKill))  in genMaddR()