Lines Matching refs:ZeroReg
2299 unsigned Opcode, unsigned ZeroReg, in copyGPRRegTuple() argument
2314 MIB.addReg(ZeroReg); in copyGPRRegTuple()
3511 unsigned CombineOpc, unsigned ZeroReg = 0, in canCombine() argument
3530 if (MI->getOperand(3).getReg() != ZeroReg) in canCombine()
3540 unsigned MulOpc, unsigned ZeroReg) { in canCombineWithMUL() argument
3541 return canCombine(MBB, MO, MulOpc, ZeroReg, true); in canCombineWithMUL()
4157 unsigned BitSize, OrrOpc, ZeroReg; in genAlternativeCodeSequence() local
4162 ZeroReg = AArch64::WZR; in genAlternativeCodeSequence()
4169 ZeroReg = AArch64::XZR; in genAlternativeCodeSequence()
4185 .addReg(ZeroReg) in genAlternativeCodeSequence()
4201 unsigned SubOpc, ZeroReg; in genAlternativeCodeSequence() local
4205 ZeroReg = AArch64::WZR; in genAlternativeCodeSequence()
4211 ZeroReg = AArch64::XZR; in genAlternativeCodeSequence()
4219 .addReg(ZeroReg) in genAlternativeCodeSequence()
4249 unsigned BitSize, OrrOpc, ZeroReg; in genAlternativeCodeSequence() local
4254 ZeroReg = AArch64::WZR; in genAlternativeCodeSequence()
4261 ZeroReg = AArch64::XZR; in genAlternativeCodeSequence()
4276 .addReg(ZeroReg) in genAlternativeCodeSequence()