240   setOperationAction(ISD::SINT_TO_FP, MVT::i32, Custom);  in AArch64TargetLowering()
241   setOperationAction(ISD::SINT_TO_FP, MVT::i64, Custom);  in AArch64TargetLowering()
242   setOperationAction(ISD::SINT_TO_FP, MVT::i128, Custom);  in AArch64TargetLowering()
557   setTargetDAGCombine(ISD::SINT_TO_FP);  in AArch64TargetLowering()
651     setOperationAction(ISD::SINT_TO_FP, MVT::v1i64, Expand);  in AArch64TargetLowering()
660     setOperationPromotedToType(ISD::SINT_TO_FP, MVT::v4i8, MVT::v4i32);  in AArch64TargetLowering()
662     setOperationPromotedToType(ISD::SINT_TO_FP, MVT::v4i16, MVT::v4i32);  in AArch64TargetLowering()
665     setOperationPromotedToType(ISD::SINT_TO_FP, MVT::v8i8, MVT::v8i32);  in AArch64TargetLowering()
667     setOperationPromotedToType(ISD::SINT_TO_FP, MVT::v8i16, MVT::v8i32);  in AArch64TargetLowering()
670     setOperationAction(ISD::SINT_TO_FP, MVT::v2i32, Custom);  in AArch64TargetLowering()
672     setOperationAction(ISD::SINT_TO_FP, MVT::v2i64, Custom);  in AArch64TargetLowering()
676     setOperationAction(ISD::SINT_TO_FP, MVT::v4i32, Custom);  in AArch64TargetLowering()
2415         Op.getOpcode() == ISD::SINT_TO_FP ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND;  in LowerVectorINT_TO_FP()
2449   if (Op.getOpcode() == ISD::SINT_TO_FP)  in LowerINT_TO_FP()
2939   case ISD::SINT_TO_FP:  in LowerOperation()
9077         (N->getOpcode() == ISD::SINT_TO_FP) ? AArch64ISD::SITOF : AArch64ISD::UITOF;  in performIntToFpCombine()
9168       (Opc != ISD::SINT_TO_FP && Opc != ISD::UINT_TO_FP))  in performFDivCombine()
9213   bool IsSigned = Opc == ISD::SINT_TO_FP;  in performFDivCombine()
11193   case ISD::SINT_TO_FP:  in PerformDAGCombine()