Lines Matching refs:Invert
1449 bool &Invert) { in changeVectorFPCCToAArch64CC() argument
1450 Invert = false; in changeVectorFPCCToAArch64CC()
1457 Invert = true; in changeVectorFPCCToAArch64CC()
1470 Invert = true; in changeVectorFPCCToAArch64CC()
10931 static SDValue getTestBitOperand(SDValue Op, unsigned &Bit, bool &Invert, in getTestBitOperand() argument
10945 return getTestBitOperand(Op->getOperand(0), Bit, Invert, DAG); in getTestBitOperand()
10962 return getTestBitOperand(Op->getOperand(0), Bit, Invert, DAG); in getTestBitOperand()
10970 return getTestBitOperand(Op->getOperand(0), Bit, Invert, DAG); in getTestBitOperand()
10979 return getTestBitOperand(Op->getOperand(0), Bit, Invert, DAG); in getTestBitOperand()
10985 return getTestBitOperand(Op->getOperand(0), Bit, Invert, DAG); in getTestBitOperand()
10992 Invert = !Invert; in getTestBitOperand()
10993 return getTestBitOperand(Op->getOperand(0), Bit, Invert, DAG); in getTestBitOperand()
11002 bool Invert = false; in performTBZCombine() local
11004 SDValue NewTestSrc = getTestBitOperand(TestSrc, Bit, Invert, DAG); in performTBZCombine()
11010 if (Invert) { in performTBZCombine()