4499   AArch64CC::CondCode CC1, CC2;  in LowerBR_CC()  local
4500   changeFPCCToAArch64CC(CC, CC1, CC2);  in LowerBR_CC()
4504   if (CC2 != AArch64CC::AL) {  in LowerBR_CC()
4505     SDValue CC2Val = DAG.getConstant(CC2, dl, MVT::i32);  in LowerBR_CC()
4692   AArch64CC::CondCode CC1, CC2;  in LowerSETCC()  local
4693   changeFPCCToAArch64CC(CC, CC1, CC2);  in LowerSETCC()
4694   if (CC2 == AArch64CC::AL) {  in LowerSETCC()
4695     changeFPCCToAArch64CC(ISD::getSetCCInverse(CC, false), CC1, CC2);  in LowerSETCC()
4713     SDValue CC2Val = DAG.getConstant(CC2, dl, MVT::i32);  in LowerSETCC()
4870   AArch64CC::CondCode CC1, CC2;  in LowerSELECT_CC()  local
4871   changeFPCCToAArch64CC(CC, CC1, CC2);  in LowerSELECT_CC()
4897   if (CC2 != AArch64CC::AL) {  in LowerSELECT_CC()
4898     SDValue CC2Val = DAG.getConstant(CC2, dl, MVT::i32);  in LowerSELECT_CC()
7846   AArch64CC::CondCode CC1, CC2;  in LowerVSETCC()  local
7848   changeVectorFPCCToAArch64CC(CC, CC1, CC2, ShouldInvert);  in LowerVSETCC()
7856   if (CC2 != AArch64CC::AL) {  in LowerVSETCC()
7858         EmitVectorComparison(LHS, RHS, CC2, NoNaNs, CmpVT, dl, DAG);  in LowerVSETCC()