389   const TargetRegisterClass *RC = (VT == MVT::i64) ? &AArch64::GPR64RegClass  in materializeInt()
423         &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;  in materializeFP()
481     ResultReg = createResultReg(&AArch64::GPR64RegClass);  in materializeGV()
1303       Is64Bit ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;  in emitAddSub_rr()
1346     RC = Is64Bit ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;  in emitAddSub_ri()
1390       Is64Bit ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;  in emitAddSub_rs()
1433     RC = Is64Bit ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;  in emitAddSub_rx()
1734     RC = &AArch64::GPR64RegClass;  in emitLogicalOp_rs()
1836              &AArch64::GPR64RegClass: &AArch64::GPR32RegClass;  in emitLoad()
1841              &AArch64::GPR64RegClass: &AArch64::GPR32RegClass;  in emitLoad()
1846              &AArch64::GPR64RegClass: &AArch64::GPR32RegClass;  in emitLoad()
1850     RC = &AArch64::GPR64RegClass;  in emitLoad()
1878     unsigned Reg64 = createResultReg(&AArch64::GPR64RegClass);  in emitLoad()
2696     RC = &AArch64::GPR64RegClass;  in selectSelect()
2865       DestVT == MVT::i32 ? &AArch64::GPR32RegClass : &AArch64::GPR64RegClass);  in selectFPToInt()
3000       RC = &AArch64::GPR64RegClass;  in fastLowerArguments()
3249       CallReg = createResultReg(&AArch64::GPR64RegClass);  in fastLowerCall()
3442     unsigned SrcReg = MRI.createVirtualRegister(&AArch64::GPR64RegClass);  in fastLowerIntrinsicCall()
3453       DestReg = fastEmitInst_ri(AArch64::LDRXui, &AArch64::GPR64RegClass,  in fastLowerIntrinsicCall()
3969       unsigned Reg64 = MRI.createVirtualRegister(&AArch64::GPR64RegClass);  in emiti1Ext()
4003       (RetVT == MVT::i64) ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;  in emitMul_rr()
4013   return fastEmitInst_rrr(AArch64::SMADDLrrr, &AArch64::GPR64RegClass,  in emitSMULL_rr()
4023   return fastEmitInst_rrr(AArch64::UMADDLrrr, &AArch64::GPR64RegClass,  in emitUMULL_rr()
4042       (RetVT == MVT::i64) ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;  in emitLSL_rr()
4070       Is64Bit ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;  in emitLSL_ri()
4148       (RetVT == MVT::i64) ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;  in emitLSR_rr()
4177       Is64Bit ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;  in emitLSR_ri()
4269       (RetVT == MVT::i64) ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;  in emitASR_rr()
4298       Is64Bit ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;  in emitASR_ri()
4411     unsigned Src64 = MRI.createVirtualRegister(&AArch64::GPR64RegClass);  in emitIntExt()
4421       (DestVT == MVT::i64) ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;  in emitIntExt()
4508     unsigned Reg64 = createResultReg(&AArch64::GPR64RegClass);  in optimizeIntExtLoad()
4552         unsigned ResultReg = createResultReg(&AArch64::GPR64RegClass);  in selectIntExt()
4614       (DestVT == MVT::i64) ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;  in selectRem()
4813   case MVT::i64: RC = &AArch64::GPR64RegClass; break;  in selectBitCast()
4908     RC = &AArch64::GPR64RegClass;  in selectSDiv()
5055     ResRC = &AArch64::GPR64RegClass;  in selectAtomicCmpXchg()