390                                                    : &AArch64::GPR32RegClass;  in materializeInt()
423         &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;  in materializeFP()
1303       Is64Bit ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;  in emitAddSub_rr()
1346     RC = Is64Bit ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;  in emitAddSub_ri()
1390       Is64Bit ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;  in emitAddSub_rs()
1433     RC = Is64Bit ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;  in emitAddSub_rx()
1730     RC = &AArch64::GPR32RegClass;  in emitLogicalOp_rs()
1836              &AArch64::GPR64RegClass: &AArch64::GPR32RegClass;  in emitLoad()
1841              &AArch64::GPR64RegClass: &AArch64::GPR32RegClass;  in emitLoad()
1846              &AArch64::GPR64RegClass: &AArch64::GPR32RegClass;  in emitLoad()
2549     ResultReg = createResultReg(&AArch64::GPR32RegClass);  in selectCmp()
2568   ResultReg = createResultReg(&AArch64::GPR32RegClass);  in selectCmp()
2589     unsigned TmpReg1 = createResultReg(&AArch64::GPR32RegClass);  in selectCmp()
2670   unsigned ResultReg = fastEmitInst_rr(Opc, &AArch64::GPR32RegClass, Src1Reg,  in optimizeSelect()
2692     RC = &AArch64::GPR32RegClass;  in selectSelect()
2865       DestVT == MVT::i32 ? &AArch64::GPR32RegClass : &AArch64::GPR64RegClass);  in selectFPToInt()
2996       RC = &AArch64::GPR32RegClass;  in fastLowerArguments()
3775     ResultReg2 = fastEmitInst_rri(AArch64::CSINCWr, &AArch64::GPR32RegClass,  in fastLowerIntrinsicCall()
3945     ResultReg = createResultReg(&AArch64::GPR32RegClass);  in selectTrunc()
3983     return fastEmitInst_rii(AArch64::SBFMWri, &AArch64::GPR32RegClass, SrcReg,  in emiti1Ext()
4003       (RetVT == MVT::i64) ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;  in emitMul_rr()
4042       (RetVT == MVT::i64) ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;  in emitLSL_rr()
4070       Is64Bit ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;  in emitLSL_ri()
4148       (RetVT == MVT::i64) ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;  in emitLSR_rr()
4177       Is64Bit ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;  in emitLSR_ri()
4269       (RetVT == MVT::i64) ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;  in emitASR_rr()
4298       Is64Bit ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;  in emitASR_ri()
4421       (DestVT == MVT::i64) ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;  in emitIntExt()
4614       (DestVT == MVT::i64) ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;  in selectRem()
4812   case MVT::i32: RC = &AArch64::GPR32RegClass; break;  in selectBitCast()
4911     RC = &AArch64::GPR32RegClass;  in selectSDiv()
5051     ResRC = &AArch64::GPR32RegClass;  in selectAtomicCmpXchg()
5070   const unsigned ResultReg2 = createResultReg(&AArch64::GPR32RegClass);  in selectAtomicCmpXchg()
5071   const unsigned ScratchReg = createResultReg(&AArch64::GPR32RegClass);  in selectAtomicCmpXchg()