Lines Matching refs:DefMI
186 const MachineInstr *DefMI, unsigned DefOperIdx, in computeOperandLatency() argument
190 return TII->defaultDefLatency(SchedModel, *DefMI); in computeOperandLatency()
195 OperLatency = TII->getOperandLatency(&InstrItins, *DefMI, DefOperIdx, in computeOperandLatency()
199 unsigned DefClass = DefMI->getDesc().getSchedClass(); in computeOperandLatency()
206 unsigned InstrLatency = TII->getInstrLatency(&InstrItins, *DefMI); in computeOperandLatency()
214 std::max(InstrLatency, TII->defaultDefLatency(SchedModel, *DefMI)); in computeOperandLatency()
218 const MCSchedClassDesc *SCDesc = resolveSchedClass(DefMI); in computeOperandLatency()
219 unsigned DefIdx = findDefIdx(DefMI, DefOperIdx); in computeOperandLatency()
242 if (SCDesc->isValid() && !DefMI->getOperand(DefOperIdx).isImplicit() in computeOperandLatency()
243 && !DefMI->getDesc().OpInfo[DefOperIdx].isOptionalDef() in computeOperandLatency()
246 << *DefMI << " (Try with MCSchedModel.CompleteModel set to false)"; in computeOperandLatency()
253 return DefMI->isTransient() ? 0 : TII->defaultDefLatency(SchedModel, *DefMI); in computeOperandLatency()
291 computeOutputLatency(const MachineInstr *DefMI, unsigned DefOperIdx, in computeOutputLatency() argument
304 unsigned Reg = DefMI->getOperand(DefOperIdx).getReg(); in computeOutputLatency()
305 const MachineFunction &MF = *DefMI->getMF(); in computeOutputLatency()
308 return computeInstrLatency(DefMI); in computeOutputLatency()
313 const MCSchedClassDesc *SCDesc = resolveSchedClass(DefMI); in computeOutputLatency()