734     MachineInstr &Root,  in getMachineCombinerPatterns()  argument
737   if (isReassociationCandidate(Root, Commute)) {  in getMachineCombinerPatterns()
764     MachineInstr &Root, MachineInstr &Prev,  in reassociateOps()  argument
769   MachineFunction *MF = Root.getMF();  in reassociateOps()
773   const TargetRegisterClass *RC = Root.getRegClassConstraint(0, TII, TRI);  in reassociateOps()
795   MachineOperand &OpB = Root.getOperand(OpIdx[Row][1]);  in reassociateOps()
797   MachineOperand &OpY = Root.getOperand(OpIdx[Row][3]);  in reassociateOps()
798   MachineOperand &OpC = Root.getOperand(0);  in reassociateOps()
823   unsigned Opcode = Root.getOpcode();  in reassociateOps()
834       BuildMI(*MF, Root.getDebugLoc(), TII->get(Opcode), RegC)  in reassociateOps()
838   setSpecialOperandAttr(Root, Prev, *MIB1, *MIB2);  in reassociateOps()
844   DelInstrs.push_back(&Root);  in reassociateOps()
848     MachineInstr &Root, MachineCombinerPattern Pattern,  in genAlternativeCodeSequence()  argument
852   MachineRegisterInfo &MRI = Root.getMF()->getRegInfo();  in genAlternativeCodeSequence()
859     Prev = MRI.getUniqueVRegDef(Root.getOperand(1).getReg());  in genAlternativeCodeSequence()
863     Prev = MRI.getUniqueVRegDef(Root.getOperand(2).getReg());  in genAlternativeCodeSequence()
871   reassociateOps(Root, *Prev, Pattern, InsInstrs, DelInstrs, InstIdxForVirtReg);  in genAlternativeCodeSequence()