Lines Matching refs:IntvOut
1602 unsigned IntvOut, SlotIndex EnterAfter){ in splitLiveThroughBlock() argument
1608 << ", live-through " << IntvIn << " -> " << IntvOut); in splitLiveThroughBlock()
1610 assert((IntvIn || IntvOut) && "Use splitSingleBlock for isolated blocks"); in splitLiveThroughBlock()
1618 if (!IntvOut) { in splitLiveThroughBlock()
1639 selectIntv(IntvOut); in splitLiveThroughBlock()
1646 if (IntvIn == IntvOut && !LeaveBefore && !EnterAfter) { in splitLiveThroughBlock()
1652 selectIntv(IntvOut); in splitLiveThroughBlock()
1659 assert((!IntvOut || !EnterAfter || EnterAfter < LSP) && "Impossible intf"); in splitLiveThroughBlock()
1661 if (IntvIn != IntvOut && (!LeaveBefore || !EnterAfter || in splitLiveThroughBlock()
1669 selectIntv(IntvOut); in splitLiveThroughBlock()
1692 selectIntv(IntvOut); in splitLiveThroughBlock()
1797 unsigned IntvOut, SlotIndex EnterAfter) { in splitRegOutBlock() argument
1803 << BI.LastInstr << ", reg-out " << IntvOut in splitRegOutBlock()
1809 assert(IntvOut && "Must have register out"); in splitRegOutBlock()
1820 selectIntv(IntvOut); in splitRegOutBlock()
1832 selectIntv(IntvOut); in splitRegOutBlock()
1848 selectIntv(IntvOut); in splitRegOutBlock()