361     MVT RegisterVT;  in getCopyFromPartsVector()  local
368           NumIntermediates, RegisterVT);  in getCopyFromPartsVector()
372                                      NumIntermediates, RegisterVT);  in getCopyFromPartsVector()
377     assert(RegisterVT == PartVT && "Part type doesn't match vector breakdown!");  in getCopyFromPartsVector()
378     assert(RegisterVT.getSizeInBits() ==  in getCopyFromPartsVector()
694   MVT RegisterVT;  in getCopyToPartsVector()  local
700         NumIntermediates, RegisterVT);  in getCopyToPartsVector()
704                                    NumIntermediates, RegisterVT);  in getCopyToPartsVector()
709   assert(RegisterVT == PartVT && "Part type doesn't match vector breakdown!");  in getCopyToPartsVector()
776     MVT RegisterVT =  in RegsForValue()  local
782     RegVTs.push_back(RegisterVT);  in RegsForValue()
805     MVT RegisterVT = isABIMangled() ? TLI.getRegisterTypeForCallingConv(  in getCopyFromRegs()  local
814         P = DAG.getCopyFromReg(Chain, dl, Regs[Part+i], RegisterVT);  in getCopyFromRegs()
816         P = DAG.getCopyFromReg(Chain, dl, Regs[Part+i], RegisterVT, *Flag);  in getCopyFromRegs()
826           !RegisterVT.isInteger())  in getCopyFromRegs()
834       unsigned RegSize = RegisterVT.getScalarSizeInBits();  in getCopyFromRegs()
842         Parts[i] = DAG.getConstant(0, dl, RegisterVT);  in getCopyFromRegs()
863                              RegisterVT, P, DAG.getValueType(FromVT));  in getCopyFromRegs()
867                                      RegisterVT, ValueVT, V, CallConv);  in getCopyFromRegs()
888     MVT RegisterVT = isABIMangled() ? TLI.getRegisterTypeForCallingConv(  in getCopyToRegs()  local
893     if (ExtendKind == ISD::ANY_EXTEND && TLI.isZExtFree(Val, RegisterVT))  in getCopyToRegs()
897                    NumParts, RegisterVT, V, CallConv, ExtendKind);  in getCopyToRegs()
975     MVT RegisterVT = RegVTs[Value];  in AddInlineAsmOperands()  local
979       Ops.push_back(DAG.getRegister(TheReg, RegisterVT));  in AddInlineAsmOperands()
990     MVT RegisterVT = std::get<1>(CountAndVT);  in getRegsAndSizes()  local
991     unsigned RegisterSize = RegisterVT.getSizeInBits();  in getRegsAndSizes()
8443       MVT RegisterVT = getRegisterType(CLI.RetTy->getContext(), RetVT);  in LowerCallTo()  local
8445       unsigned RegisterVTByteSZ = RegisterVT.getSizeInBits() / 8;  in LowerCallTo()
8446       RetTys.append(NumRegs, RegisterVT);  in LowerCallTo()
8496       MVT RegisterVT = getRegisterTypeForCallingConv(CLI.RetTy->getContext(),  in LowerCallTo()  local
8502         MyFlags.VT = RegisterVT;  in LowerCallTo()
8743       MVT RegisterVT = getRegisterTypeForCallingConv(CLI.RetTy->getContext(),  in LowerCallTo()  local
8749                                               NumRegs, RegisterVT, VT, nullptr,  in LowerCallTo()
9007     MVT RegisterVT = TLI->getRegisterType(*DAG.getContext(), ValueVTs[0]);  in LowerArguments()  local
9008     ISD::InputArg RetArg(Flags, RegisterVT, ValueVTs[0], true,  in LowerArguments()
9103       MVT RegisterVT = TLI->getRegisterTypeForCallingConv(  in LowerArguments()  local
9108         ISD::InputArg MyFlags(Flags, RegisterVT, VT, isArgValueUsed,  in LowerArguments()
9109                               ArgNo, PartBase+i*RegisterVT.getStoreSize());  in LowerArguments()