Lines Matching refs:Preds
551 for (SDep &Pred : SU->Preds) { in ReleasePredecessors()
833 for (SDep &Pred : SU->Preds) { in UnscheduleNodeBottomUp()
1055 for (SDep &Pred : SU->Preds) { in TryUnfoldSU()
1180 for (SDep &Pred : SU->Preds) in CopyAndMoveSuccessors()
1344 for (SDep &Pred : SU->Preds) { in DelayForLiveRegsBottomUp()
1943 for (unsigned P = Temp.PredsProcessed; P < TempSU->Preds.size(); ++P) { in CalcNodeSethiUllmanNumber()
1944 auto &Pred = TempSU->Preds[P]; in CalcNodeSethiUllmanNumber()
1967 for (const SDep &Pred : TempSU->Preds) { in CalcNodeSethiUllmanNumber()
2070 for (const SDep &Pred : SU->Preds) { in HighRegPressure()
2119 for (const SDep &Pred : SU->Preds) { in RegPressureDiff()
2162 for (const SDep &Pred : SU->Preds) { in scheduledNode()
2244 for (const SDep &Pred : SU->Preds) { in unscheduledNode()
2330 for (const SDep &Pred : SU->Preds) { in calcMaxScratches()
2341 for (const SDep &Pred : SU->Preds) { in hasOnlyLiveInOpers()
2400 for (const SDep &Pred : SU->Preds) { in initVRegCycle()
2412 for (const SDep &Pred : SU->Preds) { in resetVRegCycle()
2430 for (const SDep &Pred : SU->Preds) { in hasVRegCycleUse()
2832 for (const SDep &SuccPred : SuccSU->Preds) { in canClobberReachingPhysRegUse()
2944 for (const SDep &Pred : SU.Preds) in PrescheduleNodesWithMultipleUses()