Lines Matching refs:LegalOperations
122 bool LegalOperations = false; member in __anon03ecab350111::DAGCombiner
596 if (LegalOperations) in hasOperation()
697 static char isNegatibleForFree(SDValue Op, bool LegalOperations, in isNegatibleForFree() argument
718 if (!LegalOperations) in isNegatibleForFree()
731 if (LegalOperations && !TLI.isOperationLegalOrCustom(ISD::FSUB, VT)) in isNegatibleForFree()
735 if (char V = isNegatibleForFree(Op.getOperand(0), LegalOperations, TLI, in isNegatibleForFree()
739 return isNegatibleForFree(Op.getOperand(1), LegalOperations, TLI, Options, in isNegatibleForFree()
753 if (char V = isNegatibleForFree(Op.getOperand(0), LegalOperations, TLI, in isNegatibleForFree()
757 return isNegatibleForFree(Op.getOperand(1), LegalOperations, TLI, Options, in isNegatibleForFree()
763 return isNegatibleForFree(Op.getOperand(0), LegalOperations, TLI, Options, in isNegatibleForFree()
770 bool LegalOperations, unsigned Depth = 0) { in GetNegatedExpression() argument
790 if (isNegatibleForFree(Op.getOperand(0), LegalOperations, in GetNegatedExpression()
794 LegalOperations, Depth+1), in GetNegatedExpression()
799 LegalOperations, Depth+1), in GetNegatedExpression()
814 if (isNegatibleForFree(Op.getOperand(0), LegalOperations, in GetNegatedExpression()
818 LegalOperations, Depth+1), in GetNegatedExpression()
825 LegalOperations, Depth+1), Flags); in GetNegatedExpression()
831 LegalOperations, Depth+1)); in GetNegatedExpression()
835 LegalOperations, Depth+1), in GetNegatedExpression()
1030 TargetLowering::TargetLoweringOpt TLO(DAG, LegalTypes, LegalOperations); in SimplifyDemandedBits()
1053 TargetLowering::TargetLoweringOpt TLO(DAG, LegalTypes, LegalOperations); in SimplifyDemandedVectorElts()
1158 if (!LegalOperations) in PromoteIntBinOp()
1223 if (!LegalOperations) in PromoteIntShiftOp()
1273 if (!LegalOperations) in PromoteExtend()
1301 if (!LegalOperations) in PromoteLoad()
1383 LegalOperations = Level >= AfterLegalizeVectorOps; in Run()
2077 if ((!LegalOperations || in visitADD()
2161 if ((!LegalOperations || TLI.isOperationLegal(ISD::OR, VT)) && in visitADD()
2482 if (!LegalOperations || in visitADDCARRY()
2569 SelectionDAG &DAG, bool LegalOperations) { in tryFoldToZero() argument
2572 if (!LegalOperations || TLI.isOperationLegal(ISD::BUILD_VECTOR, VT)) in tryFoldToZero()
2596 return tryFoldToZero(DL, TLI, VT, DAG, LegalOperations); in visitSUB()
2625 if (!LegalOperations || TLI.isOperationLegal(NewSh, VT)) in visitSUB()
2747 if (!LegalOperations && TLI.isOffsetFoldingLegal(GA)) { in visitSUB()
2772 if (!LegalOperations && N1.getOpcode() == ISD::SRL && N1.hasOneUse()) { in visitSUB()
2900 if (!LegalOperations || in visitSUBCARRY()
3652 if (!HiExists && (!LegalOperations || in SimplifyNodeWithTwoResults()
3660 if (!LoExists && (!LegalOperations || in SimplifyNodeWithTwoResults()
3676 (!LegalOperations || in SimplifyNodeWithTwoResults()
3686 (!LegalOperations || in SimplifyNodeWithTwoResults()
3853 if ((VT.isVector() || LegalOperations) && in hoistLogicOpWithSameOpcodeHands()
3876 if (LegalOperations && !TLI.isOperationLegal(LogicOpcode, XVT)) in hoistLogicOpWithSameOpcodeHands()
3955 ShOp = tryFoldToZero(DL, TLI, VT, DAG, LegalOperations); in hoistLogicOpWithSameOpcodeHands()
3968 ShOp = tryFoldToZero(DL, TLI, VT, DAG, LegalOperations); in hoistLogicOpWithSameOpcodeHands()
4000 if (LegalOperations || VT.getScalarType() != MVT::i1) in foldLogicOfSetCCs()
4092 (!LegalOperations || in foldLogicOfSetCCs()
4211 (!LegalOperations || in isAndLoadExtLoad()
4227 if (LegalOperations && in isAndLoadExtLoad()
4277 if (LegalOperations && in isLegalNarrowLdSt()
4305 if (LegalOperations && in isLegalNarrowLdSt()
4784 ((!LegalOperations && !LN0->isVolatile()) || in visitAND()
4804 ((!LegalOperations && !LN0->isVolatile()) || in visitAND()
4830 if (!LegalOperations) in MatchBSwapHWordLow()
5037 if (!LegalOperations) in MatchBSwapHWord()
5112 if (!LegalOperations && (N0.isUndef() || N1.isUndef())) in visitORLike()
5916 if (LegalOperations && !TLI.isOperationLegal(ISD::LOAD, VT)) in MatchLoadCombine()
6016 if (NeedsBswap && LegalOperations && !TLI.isOperationLegal(ISD::BSWAP, VT)) in MatchLoadCombine()
6172 if (!LegalOperations || in visitXOR()
6269 return tryFoldToZero(DL, TLI, VT, DAG, LegalOperations); in visitXOR()
6737 if ((!LegalOperations || in visitSRA()
7153 if (!LegalOperations || TLI.isOperationLegal(ISD::CTLZ_ZERO_UNDEF, VT)) { in visitCTLZ()
7180 if (!LegalOperations || TLI.isOperationLegal(ISD::CTTZ_ZERO_UNDEF, VT)) { in visitCTTZ()
7286 if (CondVT == MVT::i1 && !LegalOperations) { in foldSelectOfConstants()
7494 if (!LegalOperations && TLI.isOperationLegalOrCustom(ISD::UADDO, VT) && in visitSELECT()
7519 (!LegalOperations && TLI.isOperationLegalOrCustom(ISD::SELECT_CC, VT))) in visitSELECT()
8396 (LegalOperations && !TLI.isOperationLegal(N0.getOpcode(), VT))) in CombineZExtLogicopShiftLoad()
8403 (LegalOperations && !TLI.isOperationLegal(N1.getOpcode(), VT))) in CombineZExtLogicopShiftLoad()
8471 if (LegalOperations || !TLI.isOperationLegalOrCustom(ISD::VSELECT, VT)) in matchVSelectOpSizesWithSetCC()
8505 bool LegalOperations, SDNode *N, in tryToFoldExtOfExtload() argument
8516 if ((LegalOperations || LN0->isVolatile() || VT.isVector()) && in tryToFoldExtOfExtload()
8533 bool LegalOperations, SDNode *N, SDValue N0, in tryToFoldExtOfLoad() argument
8538 ((LegalOperations || VT.isVector() || in tryToFoldExtOfLoad()
8571 bool LegalOperations) { in foldExtendedSignBitTest() argument
8576 if (LegalOperations || SetCC.getOpcode() != ISD::SETCC || in foldExtendedSignBitTest()
8653 if (!LegalOperations || TLI.isOperationLegal(ISD::SIGN_EXTEND_INREG, in visitSIGN_EXTEND()
8666 tryToFoldExtOfLoad(DAG, *this, TLI, VT, LegalOperations, N, N0, in visitSIGN_EXTEND()
8677 DAG, *this, TLI, VT, LegalOperations, N, N0, ISD::SEXTLOAD)) in visitSIGN_EXTEND()
8686 (!LegalOperations && TLI.isOperationLegal(N0.getOpcode(), VT))) { in visitSIGN_EXTEND()
8725 if (SDValue V = foldExtendedSignBitTest(N, DAG, LegalOperations)) in visitSIGN_EXTEND()
8736 if (VT.isVector() && !LegalOperations && in visitSIGN_EXTEND()
8792 (!LegalOperations || TLI.isOperationLegal(ISD::SETCC, N00VT))) { in visitSIGN_EXTEND()
8800 if ((!LegalOperations || TLI.isOperationLegal(ISD::ZERO_EXTEND, VT)) && in visitSIGN_EXTEND()
8893 if (!LegalOperations || (TLI.isOperationLegal(ISD::AND, SrcVT) && in visitZERO_EXTEND()
8905 if (!LegalOperations || TLI.isOperationLegal(ISD::AND, VT)) { in visitZERO_EXTEND()
8935 tryToFoldExtOfLoad(DAG, *this, TLI, VT, LegalOperations, N, N0, in visitZERO_EXTEND()
8952 (!LegalOperations && TLI.isOperationLegal(N0.getOpcode(), VT))) { in visitZERO_EXTEND()
9010 DAG, *this, TLI, VT, LegalOperations, N, N0, ISD::ZEXTLOAD)) in visitZERO_EXTEND()
9013 if (SDValue V = foldExtendedSignBitTest(N, DAG, LegalOperations)) in visitZERO_EXTEND()
9018 if (!LegalOperations && VT.isVector() && in visitZERO_EXTEND()
9182 if (!LegalOperations || TLI.isLoadExtLegal(ExtType, VT, MemVT)) { in visitANY_EXTEND()
9198 if (VT.isVector() && !LegalOperations) { in visitANY_EXTEND()
9535 (!LegalOperations || TLI.isOperationLegal(ISD::SIGN_EXTEND, VT))) in visitSIGN_EXTEND_INREG()
9544 if (!LegalOperations || in visitSIGN_EXTEND_INREG()
9555 (!LegalOperations || TLI.isOperationLegal(ISD::SIGN_EXTEND, VT))) in visitSIGN_EXTEND_INREG()
9595 ((!LegalOperations && !cast<LoadSDNode>(N0)->isVolatile() && in visitSIGN_EXTEND_INREG()
9612 ((!LegalOperations && !cast<LoadSDNode>(N0)->isVolatile()) || in visitSIGN_EXTEND_INREG()
9717 LegalTypes && !LegalOperations && N0->hasOneUse() && VT != MVT::i1) { in visitTRUNCATE()
9744 if ((!LegalOperations || TLI.isOperationLegal(ISD::SELECT, SrcVT)) && in visitTRUNCATE()
9756 (!LegalOperations || TLI.isOperationLegalOrCustom(ISD::SHL, VT)) && in visitTRUNCATE()
9888 (!LegalOperations || in visitTRUNCATE()
9909 (!LegalOperations || TLI.isOperationLegal(N0.getOpcode(), VT))) { in visitTRUNCATE()
9947 if (!LegalOperations && N0.hasOneUse() && in visitTRUNCATE()
9998 (!LegalOperations || TLI.isOperationLegal(ISD::LOAD, VT))) in CombineConsecutiveLoads()
10089 if (!LegalOperations || in visitBITCAST()
10115 ((!LegalOperations && !cast<LoadSDNode>(N0)->isVolatile()) || in visitBITCAST()
10454 bool HasFMAD = (LegalOperations && TLI.isOperationLegal(ISD::FMAD, VT)); in visitFADDForFMACombine()
10459 (!LegalOperations || TLI.isOperationLegalOrCustom(ISD::FMA, VT)); in visitFADDForFMACombine()
10665 bool HasFMAD = (LegalOperations && TLI.isOperationLegal(ISD::FMAD, VT)); in visitFSUBForFMACombine()
10670 (!LegalOperations || TLI.isOperationLegalOrCustom(ISD::FMA, VT)); in visitFSUBForFMACombine()
10968 (!LegalOperations || TLI.isOperationLegalOrCustom(ISD::FMA, VT)); in visitFMULForFMADistributiveCombine()
10973 (LegalOperations && TLI.isOperationLegal(ISD::FMAD, VT)); in visitFMULForFMADistributiveCombine()
11073 if ((!LegalOperations || TLI.isOperationLegalOrCustom(ISD::FSUB, VT)) && in visitFADD()
11074 isNegatibleForFree(N1, LegalOperations, TLI, &Options) == 2) in visitFADD()
11076 GetNegatedExpression(N1, DAG, LegalOperations), Flags); in visitFADD()
11079 if ((!LegalOperations || TLI.isOperationLegalOrCustom(ISD::FSUB, VT)) && in visitFADD()
11080 isNegatibleForFree(N0, LegalOperations, TLI, &Options) == 2) in visitFADD()
11082 GetNegatedExpression(N0, DAG, LegalOperations), Flags); in visitFADD()
11257 if (isNegatibleForFree(N1, LegalOperations, TLI, &Options)) in visitFSUB()
11258 return GetNegatedExpression(N1, DAG, LegalOperations); in visitFSUB()
11259 if (!LegalOperations || TLI.isOperationLegal(ISD::FNEG, VT)) in visitFSUB()
11276 if (isNegatibleForFree(N1, LegalOperations, TLI, &Options)) in visitFSUB()
11278 GetNegatedExpression(N1, DAG, LegalOperations), Flags); in visitFSUB()
11360 if (!LegalOperations || TLI.isOperationLegal(ISD::FNEG, VT)) in visitFMUL()
11364 if (char LHSNeg = isNegatibleForFree(N0, LegalOperations, TLI, &Options)) { in visitFMUL()
11365 if (char RHSNeg = isNegatibleForFree(N1, LegalOperations, TLI, &Options)) { in visitFMUL()
11370 GetNegatedExpression(N0, DAG, LegalOperations), in visitFMUL()
11371 GetNegatedExpression(N1, DAG, LegalOperations), in visitFMUL()
11499 (!LegalOperations || TLI.isOperationLegal(ISD::FNEG, VT))) { in visitFMA()
11632 (!LegalOperations || in visitFDIV()
11695 if (char LHSNeg = isNegatibleForFree(N0, LegalOperations, TLI, &Options)) { in visitFDIV()
11696 if (char RHSNeg = isNegatibleForFree(N1, LegalOperations, TLI, &Options)) { in visitFDIV()
11701 GetNegatedExpression(N0, DAG, LegalOperations), in visitFDIV()
11702 GetNegatedExpression(N1, DAG, LegalOperations), in visitFDIV()
11776 if (!LegalOperations || TLI.isOperationLegal(ISD::FABS, VT)) in visitFCOPYSIGN()
11779 if (!LegalOperations || TLI.isOperationLegal(ISD::FNEG, VT)) in visitFCOPYSIGN()
11917 (!LegalOperations || in visitSINT_TO_FP()
11931 if (TLI.isOperationLegalOrCustom(ISD::SELECT_CC, VT) || !LegalOperations) { in visitSINT_TO_FP()
11935 (!LegalOperations || in visitSINT_TO_FP()
11949 (!LegalOperations || in visitSINT_TO_FP()
11974 (!LegalOperations || in visitUINT_TO_FP()
11988 if (TLI.isOperationLegalOrCustom(ISD::SELECT_CC, VT) || !LegalOperations) { in visitUINT_TO_FP()
11991 (!LegalOperations || in visitUINT_TO_FP()
12252 if (isNegatibleForFree(N0, LegalOperations, DAG.getTargetLoweringInfo(), in visitFNEG()
12254 return GetNegatedExpression(N0, DAG, LegalOperations); in visitFNEG()
15101 if ((isTypeLegal(MVT::i32) && !LegalOperations && !ST->isVolatile()) || in replaceStoreOfFPConstant()
15112 if ((TLI.isTypeLegal(MVT::i64) && !LegalOperations && in replaceStoreOfFPConstant()
15169 if (((!LegalOperations && !ST->isVolatile()) || in visitSTORE()
15552 if (LegalOperations && !TLI.isOperationLegal(ISD::BUILD_VECTOR, VT)) in visitINSERT_VECTOR_ELT()
15670 bool LegalOperations) { in scalarizeExtractedBinop() argument
15791 if (SDValue BO = scalarizeExtractedBinop(N, DAG, LegalOperations)) in visitEXTRACT_VECTOR_ELT()
15831 if (!LegalOperations || in visitEXTRACT_VECTOR_ELT()
15887 if (!LegalOperations && !IndexC && VecOp.hasOneUse() && in visitEXTRACT_VECTOR_ELT()
15897 if (!LegalOperations || !IndexC) in visitEXTRACT_VECTOR_ELT()
16127 if (LegalOperations && in createBuildVecShuffle()
16287 if (LegalOperations && !TLI.isOperationLegal(ISD::VECTOR_SHUFFLE, VT)) in reduceBuildVecToShuffle()
16490 if (LegalOperations) in convertBuildVecZextToZext()
16547 if (!LegalOperations) { in visitBUILD_VECTOR()
16766 if (!LegalOperations && Scalar.getOpcode() == ISD::SCALAR_TO_VECTOR && in visitCONCAT_VECTORS()
17327 bool LegalOperations) { in combineShuffleToVectorExtend() argument
17366 if (!LegalOperations || in combineShuffleToVectorExtend()
17675 if (SDValue V = combineShuffleToVectorExtend(SVN, DAG, TLI, LegalOperations)) in visitVECTOR_SHUFFLE()
18093 if (LegalOperations) in XformToShuffleWithZero()
18615 (!LegalOperations || TLI.isOperationLegal(ISD::SETCC, CmpOpVT))) { in SimplifySelectCC()
18705 (!LegalOperations || TLI.isOperationLegal(ISD::CTTZ, VT))) in SimplifySelectCC()
18712 (!LegalOperations || TLI.isOperationLegal(ISD::CTLZ, VT))) in SimplifySelectCC()
18741 if (SDValue S = TLI.BuildSDIV(N, DAG, LegalOperations, Built)) { in BuildSDIV()
18782 if (SDValue S = TLI.BuildUDIV(N, DAG, LegalOperations, Built)) { in BuildUDIV()