Lines Matching refs:PredDep
105 for (SDep &PredDep : Preds) { in addPred()
108 if (!Required && PredDep.getSUnit() == D.getSUnit()) in addPred()
110 if (PredDep.overlaps(D)) { in addPred()
113 if (PredDep.getLatency() < D.getLatency()) { in addPred()
114 SUnit *PredSU = PredDep.getSUnit(); in addPred()
116 SDep ForwardD = PredDep; in addPred()
124 PredDep.setLatency(D.getLatency()); in addPred()
235 for (SDep &PredDep : SU->Preds) { in setHeightDirty()
236 SUnit *PredSU = PredDep.getSUnit(); in setHeightDirty()
268 for (const SDep &PredDep : Cur->Preds) { in ComputeDepth() local
269 SUnit *PredSU = PredDep.getSUnit(); in ComputeDepth()
272 PredSU->Depth + PredDep.getLatency()); in ComputeDepth()
491 for (const SDep &PredDep : SU->Preds) { in InitDAGTopologicalSorting() local
492 SUnit *SU = PredDep.getSUnit(); in InitDAGTopologicalSorting()
671 for (const SDep &PredDep : TargetSU->Preds) in WillCreateCycle() local
672 if (PredDep.isAssignedRegDep() && in WillCreateCycle()
673 IsReachable(SU, PredDep.getSUnit())) in WillCreateCycle()