Lines Matching refs:getInstr

505     MachineInstr &MI = *SU.getInstr();  in addLoopCarriedDependences()
530 MachineInstr &LdMI = *Load->getInstr(); in addLoopCarriedDependences()
605 MachineInstr *MI = I.getInstr(); in updatePhiDependences()
661 MachineInstr *PMI = PI.getSUnit()->getInstr(); in updatePhiDependences()
663 if (I.getInstr()->isPHI()) { in updatePhiDependences()
686 if (!canUseLastOffsetValue(I.getInstr(), BasePos, OffsetPos, NewBase, in changeDependences()
691 unsigned OrigBase = I.getInstr()->getOperand(BasePos).getReg(); in changeDependences()
947 (SI.getKind() == SDep::Anti && !SI.getSUnit()->getInstr()->isPHI())) in createAdjacencyStructure()
958 if (!SUnits[i].getInstr()->mayStore() || in createAdjacencyStructure()
961 if (PI.getKind() == SDep::Order && PI.getSUnit()->getInstr()->mayLoad()) { in createAdjacencyStructure()
1073 if (!SU.getInstr()->isCopy() && !SU.getInstr()->isRegSequence()) in apply()
1083 MachineInstr *TmpMI = TmpSU->getInstr(); in apply()
1106 MachineInstr *TmpMI = TmpSU->getInstr(); in apply()
1334 const MachineInstr *MI = SU->getInstr(); in computeLiveOuts()
1348 for (const MachineOperand &MO : SU->getInstr()->operands()) in computeLiveOuts()
1388 MachineBasicBlock::const_iterator CurInstI = SU->getInstr(); in registerPressureFilter()
1393 RecRPTracker.getMaxUpwardPressureDelta(SU->getInstr(), nullptr, RPDelta, in registerPressureFilter()
1771 SU->getInstr()->dump(); in schedulePipeline()
1794 if (SU->getInstr()->isPHI()) in schedulePipeline()
1862 if (CI->getInstr()->isPHI()) in generatePipelinedLoop()
1864 unsigned StageNum = Schedule.stageScheduled(getSUnit(CI->getInstr())); in generatePipelinedLoop()
1865 MachineInstr *NewMI = cloneInstr(CI->getInstr(), MaxStageCount, StageNum); in generatePipelinedLoop()
1868 InstrMap[NewMI] = CI->getInstr(); in generatePipelinedLoop()
2920 (CyclePhi <= CycleSched || OrigMISU->getInstr()->isPHI())) in rewriteScheduledInstr()
3053 MachineInstr *SI = Source->getInstr(); in isLoopCarriedDep()
3054 MachineInstr *DI = Dep.getSUnit()->getInstr(); in isLoopCarriedDep()
3137 if (ST.getInstrInfo()->isZeroCost((*I)->getInstr()->getOpcode())) in insert()
3139 assert(Resources->canReserveResources(*(*I)->getInstr()) && in insert()
3141 Resources->reserveResources(*(*I)->getInstr()); in insert()
3144 if (ST.getInstrInfo()->isZeroCost(SU->getInstr()->getOpcode()) || in insert()
3145 Resources->canReserveResources(*SU->getInstr())) { in insert()
3148 SU->getInstr()->dump(); in insert()
3161 SU->getInstr()->dump(); in insert()
3218 if (DAG->isBackedge(SU, P) && P.getSUnit()->getInstr()->isPHI()) in multipleIterations()
3220 if (S.getKind() == SDep::Data && S.getSUnit()->getInstr()->isPHI()) in multipleIterations()
3259 if (BE && Dep.getSUnit() == BE && !SU->getInstr()->isPHI() && in computeStart()
3290 MachineInstr *MI = SU->getInstr(); in orderDependence()
3314 (*I)->getInstr()->readsWritesVirtualRegister(Reg); in orderDependence()
3346 isLoopCarriedDefOfUse(SSD, (*I)->getInstr(), MO)) { in orderDependence()
3423 if (UseSU->getInstr()->isPHI()) in isLoopCarried()
3529 if (!PredSU->getInstr()->isPHI() && PredIndex < Index) { in checkValidNodeOrder()
3541 if (!SuccSU->getInstr()->isPHI() && SuccIndex < Index) { in checkValidNodeOrder()
3548 if (PredBefore && SuccBefore && !SU->getInstr()->isPHI()) { in checkValidNodeOrder()
3583 MachineInstr *MI = SU->getInstr(); in fixupRegisterOverlaps()
3645 MachineInstr *MI = I.first->getInstr(); in finalizeSchedule()
3685 SSD->applyInstrChange(SU->getInstr(), *this); in finalizeSchedule()
3695 if (SU->getInstr()->isPHI()) in finalizeSchedule()
3701 if (!SU->getInstr()->isPHI()) in finalizeSchedule()
3717 os << " SU(" << I->NodeNum << ") " << *(I->getInstr()); in print()
3731 CI->getInstr()->print(os); in print()