Lines Matching refs:RevCond
916 SmallVector<MachineOperand, 4> RevCond(BBI.BrCond.begin(), BBI.BrCond.end()); in AnalyzeBranches() local
917 BBI.IsBrReversible = (RevCond.size() == 0) || in AnalyzeBranches()
918 !TII->reverseBranchCondition(RevCond); in AnalyzeBranches()
1164 RevCond(BBI.BrCond.begin(), BBI.BrCond.end()); in AnalyzeBlock() local
1165 bool CanRevCond = !TII->reverseBranchCondition(RevCond); in AnalyzeBlock()
1187 bool FalseFeasible = FeasibilityAnalysis(FalseBBI, RevCond, in AnalyzeBlock()
1278 FeasibilityAnalysis(FalseBBI, RevCond, true)) { in AnalyzeBlock()
1289 FeasibilityAnalysis(FalseBBI, RevCond, true, true)) { in AnalyzeBlock()
1299 FeasibilityAnalysis(FalseBBI, RevCond)) { in AnalyzeBlock()
1587 SmallVector<MachineOperand, 4> RevCond(CvtBBI->BrCond.begin(), in IfConvertTriangle() local
1589 if (TII->reverseBranchCondition(RevCond)) in IfConvertTriangle()
1605 TII->insertBranch(*BBI.BB, CvtBBI->FalseBB, nullptr, RevCond, dl); in IfConvertTriangle()
1679 SmallVector<MachineOperand, 4> RevCond(BBI.BrCond.begin(), BBI.BrCond.end()); in IfConvertDiamondCommon() local
1680 if (TII->reverseBranchCondition(RevCond)) in IfConvertDiamondCommon()
1683 SmallVector<MachineOperand, 4> *Cond2 = &RevCond; in IfConvertDiamondCommon()