Lines Matching refs:TargetOpcode
92 case TargetOpcode::G_SDIV: in getRTLibDesc()
95 case TargetOpcode::G_UDIV: in getRTLibDesc()
98 case TargetOpcode::G_SREM: in getRTLibDesc()
101 case TargetOpcode::G_UREM: in getRTLibDesc()
104 case TargetOpcode::G_CTLZ_ZERO_UNDEF: in getRTLibDesc()
107 case TargetOpcode::G_FADD: in getRTLibDesc()
110 case TargetOpcode::G_FSUB: in getRTLibDesc()
113 case TargetOpcode::G_FMUL: in getRTLibDesc()
116 case TargetOpcode::G_FDIV: in getRTLibDesc()
119 case TargetOpcode::G_FREM: in getRTLibDesc()
121 case TargetOpcode::G_FPOW: in getRTLibDesc()
123 case TargetOpcode::G_FMA: in getRTLibDesc()
165 case TargetOpcode::G_FPEXT: in getConvRTLibDesc()
167 case TargetOpcode::G_FPTRUNC: in getConvRTLibDesc()
169 case TargetOpcode::G_FPTOSI: in getConvRTLibDesc()
171 case TargetOpcode::G_FPTOUI: in getConvRTLibDesc()
173 case TargetOpcode::G_SITOFP: in getConvRTLibDesc()
175 case TargetOpcode::G_UITOFP: in getConvRTLibDesc()
200 case TargetOpcode::G_SDIV: in libcall()
201 case TargetOpcode::G_UDIV: in libcall()
202 case TargetOpcode::G_SREM: in libcall()
203 case TargetOpcode::G_UREM: in libcall()
204 case TargetOpcode::G_CTLZ_ZERO_UNDEF: { in libcall()
211 case TargetOpcode::G_FADD: in libcall()
212 case TargetOpcode::G_FSUB: in libcall()
213 case TargetOpcode::G_FMUL: in libcall()
214 case TargetOpcode::G_FDIV: in libcall()
215 case TargetOpcode::G_FMA: in libcall()
216 case TargetOpcode::G_FPOW: in libcall()
217 case TargetOpcode::G_FREM: { in libcall()
224 case TargetOpcode::G_FPEXT: { in libcall()
236 case TargetOpcode::G_FPTRUNC: { in libcall()
248 case TargetOpcode::G_FPTOSI: in libcall()
249 case TargetOpcode::G_FPTOUI: { in libcall()
262 case TargetOpcode::G_SITOFP: in libcall()
263 case TargetOpcode::G_UITOFP: { in libcall()
287 if (TypeIdx != 0 && MI.getOpcode() != TargetOpcode::G_EXTRACT) in narrowScalar()
298 case TargetOpcode::G_IMPLICIT_DEF: { in narrowScalar()
318 case TargetOpcode::G_ADD: { in narrowScalar()
351 case TargetOpcode::G_EXTRACT: { in narrowScalar()
411 case TargetOpcode::G_INSERT: { in narrowScalar()
476 case TargetOpcode::G_LOAD: { in narrowScalar()
520 case TargetOpcode::G_STORE: { in narrowScalar()
558 case TargetOpcode::G_CONSTANT: { in narrowScalar()
583 case TargetOpcode::G_AND: in narrowScalar()
584 case TargetOpcode::G_OR: in narrowScalar()
585 case TargetOpcode::G_XOR: { in narrowScalar()
662 case TargetOpcode::G_UADDO: in widenScalar()
663 case TargetOpcode::G_USUBO: { in widenScalar()
666 auto LHSZext = MIRBuilder.buildInstr(TargetOpcode::G_ZEXT, {WideTy}, in widenScalar()
668 auto RHSZext = MIRBuilder.buildInstr(TargetOpcode::G_ZEXT, {WideTy}, in widenScalar()
670 unsigned Opcode = MI.getOpcode() == TargetOpcode::G_UADDO in widenScalar()
671 ? TargetOpcode::G_ADD in widenScalar()
672 : TargetOpcode::G_SUB; in widenScalar()
678 TargetOpcode::G_AND, {WideTy}, in widenScalar()
688 case TargetOpcode::G_CTTZ: in widenScalar()
689 case TargetOpcode::G_CTTZ_ZERO_UNDEF: in widenScalar()
690 case TargetOpcode::G_CTLZ: in widenScalar()
691 case TargetOpcode::G_CTLZ_ZERO_UNDEF: in widenScalar()
692 case TargetOpcode::G_CTPOP: { in widenScalar()
696 if (MI.getOpcode() == TargetOpcode::G_CTTZ) { in widenScalar()
703 TargetOpcode::G_OR, {WideTy}, in widenScalar()
709 if (MI.getOpcode() == TargetOpcode::G_CTLZ || in widenScalar()
710 MI.getOpcode() == TargetOpcode::G_CTLZ_ZERO_UNDEF) { in widenScalar()
714 TargetOpcode::G_SUB, {WideTy}, in widenScalar()
720 MI.setDesc(TII.get(TargetOpcode::G_TRUNC)); in widenScalar()
726 case TargetOpcode::G_ADD: in widenScalar()
727 case TargetOpcode::G_AND: in widenScalar()
728 case TargetOpcode::G_MUL: in widenScalar()
729 case TargetOpcode::G_OR: in widenScalar()
730 case TargetOpcode::G_XOR: in widenScalar()
731 case TargetOpcode::G_SUB: in widenScalar()
736 widenScalarSrc(MI, WideTy, 1, TargetOpcode::G_ANYEXT); in widenScalar()
737 widenScalarSrc(MI, WideTy, 2, TargetOpcode::G_ANYEXT); in widenScalar()
742 case TargetOpcode::G_SHL: in widenScalar()
744 widenScalarSrc(MI, WideTy, 1, TargetOpcode::G_ANYEXT); in widenScalar()
747 widenScalarSrc(MI, WideTy, 2, TargetOpcode::G_ZEXT); in widenScalar()
752 case TargetOpcode::G_SDIV: in widenScalar()
753 case TargetOpcode::G_SREM: in widenScalar()
755 widenScalarSrc(MI, WideTy, 1, TargetOpcode::G_SEXT); in widenScalar()
756 widenScalarSrc(MI, WideTy, 2, TargetOpcode::G_SEXT); in widenScalar()
761 case TargetOpcode::G_ASHR: in widenScalar()
763 widenScalarSrc(MI, WideTy, 1, TargetOpcode::G_SEXT); in widenScalar()
766 widenScalarSrc(MI, WideTy, 2, TargetOpcode::G_ZEXT); in widenScalar()
771 case TargetOpcode::G_UDIV: in widenScalar()
772 case TargetOpcode::G_UREM: in widenScalar()
773 case TargetOpcode::G_LSHR: in widenScalar()
775 widenScalarSrc(MI, WideTy, 1, TargetOpcode::G_ZEXT); in widenScalar()
776 widenScalarSrc(MI, WideTy, 2, TargetOpcode::G_ZEXT); in widenScalar()
781 case TargetOpcode::G_SELECT: in widenScalar()
787 widenScalarSrc(MI, WideTy, 2, TargetOpcode::G_ANYEXT); in widenScalar()
788 widenScalarSrc(MI, WideTy, 3, TargetOpcode::G_ANYEXT); in widenScalar()
792 widenScalarSrc(MI, WideTy, 1, TargetOpcode::G_ZEXT); in widenScalar()
797 case TargetOpcode::G_FPTOSI: in widenScalar()
798 case TargetOpcode::G_FPTOUI: in widenScalar()
806 case TargetOpcode::G_SITOFP: in widenScalar()
810 widenScalarSrc(MI, WideTy, 1, TargetOpcode::G_SEXT); in widenScalar()
814 case TargetOpcode::G_UITOFP: in widenScalar()
818 widenScalarSrc(MI, WideTy, 1, TargetOpcode::G_ZEXT); in widenScalar()
822 case TargetOpcode::G_INSERT: in widenScalar()
826 widenScalarSrc(MI, WideTy, 1, TargetOpcode::G_ANYEXT); in widenScalar()
831 case TargetOpcode::G_LOAD: in widenScalar()
839 case TargetOpcode::G_SEXTLOAD: in widenScalar()
840 case TargetOpcode::G_ZEXTLOAD: in widenScalar()
846 case TargetOpcode::G_STORE: { in widenScalar()
852 widenScalarSrc(MI, WideTy, 0, TargetOpcode::G_ZEXT); in widenScalar()
856 case TargetOpcode::G_CONSTANT: { in widenScalar()
867 case TargetOpcode::G_FCONSTANT: { in widenScalar()
885 widenScalarDst(MI, WideTy, 0, TargetOpcode::G_FPTRUNC); in widenScalar()
889 case TargetOpcode::G_IMPLICIT_DEF: { in widenScalar()
895 case TargetOpcode::G_BRCOND: in widenScalar()
897 widenScalarSrc(MI, WideTy, 0, TargetOpcode::G_ANYEXT); in widenScalar()
901 case TargetOpcode::G_FCMP: in widenScalar()
906 widenScalarSrc(MI, WideTy, 2, TargetOpcode::G_FPEXT); in widenScalar()
907 widenScalarSrc(MI, WideTy, 3, TargetOpcode::G_FPEXT); in widenScalar()
912 case TargetOpcode::G_ICMP: in widenScalar()
919 ? TargetOpcode::G_SEXT in widenScalar()
920 : TargetOpcode::G_ZEXT; in widenScalar()
927 case TargetOpcode::G_GEP: in widenScalar()
930 widenScalarSrc(MI, WideTy, 2, TargetOpcode::G_SEXT); in widenScalar()
934 case TargetOpcode::G_PHI: { in widenScalar()
941 widenScalarSrc(MI, WideTy, I, TargetOpcode::G_ANYEXT); in widenScalar()
950 case TargetOpcode::G_EXTRACT_VECTOR_ELT: in widenScalar()
954 widenScalarSrc(MI, WideTy, 2, TargetOpcode::G_SEXT); in widenScalar()
958 case TargetOpcode::G_FCEIL: in widenScalar()
962 widenScalarSrc(MI, WideTy, 1, TargetOpcode::G_FPEXT); in widenScalar()
963 widenScalarDst(MI, WideTy, 0, TargetOpcode::G_FPTRUNC); in widenScalar()
971 using namespace TargetOpcode; in lower()
977 case TargetOpcode::G_SREM: in lower()
978 case TargetOpcode::G_UREM: { in lower()
992 case TargetOpcode::G_SMULO: in lower()
993 case TargetOpcode::G_UMULO: { in lower()
1003 unsigned Opcode = MI.getOpcode() == TargetOpcode::G_SMULO in lower()
1004 ? TargetOpcode::G_SMULH in lower()
1005 : TargetOpcode::G_UMULH; in lower()
1018 if (Opcode == TargetOpcode::G_SMULH) { in lower()
1022 MIRBuilder.buildInstr(TargetOpcode::G_ASHR) in lower()
1033 case TargetOpcode::G_FNEG: { in lower()
1060 MIRBuilder.buildInstr(TargetOpcode::G_FSUB) in lower()
1067 case TargetOpcode::G_FSUB: { in lower()
1077 MIRBuilder.buildInstr(TargetOpcode::G_FNEG).addDef(Neg).addUse(RHS); in lower()
1078 MIRBuilder.buildInstr(TargetOpcode::G_FADD) in lower()
1085 case TargetOpcode::G_ATOMIC_CMPXCHG_WITH_SUCCESS: { in lower()
1097 case TargetOpcode::G_LOAD: in lower()
1098 case TargetOpcode::G_SEXTLOAD: in lower()
1099 case TargetOpcode::G_ZEXTLOAD: { in lower()
1109 if (MI.getOpcode() == TargetOpcode::G_LOAD) in lower()
1123 case TargetOpcode::G_LOAD: in lower()
1126 case TargetOpcode::G_SEXTLOAD: in lower()
1129 case TargetOpcode::G_ZEXTLOAD: in lower()
1139 case TargetOpcode::G_CTLZ_ZERO_UNDEF: in lower()
1140 case TargetOpcode::G_CTTZ_ZERO_UNDEF: in lower()
1141 case TargetOpcode::G_CTLZ: in lower()
1142 case TargetOpcode::G_CTTZ: in lower()
1143 case TargetOpcode::G_CTPOP: in lower()
1177 case TargetOpcode::G_IMPLICIT_DEF: { in fewerElementsVector()
1203 case TargetOpcode::G_ADD: { in fewerElementsVector()
1227 case TargetOpcode::G_LOAD: in fewerElementsVector()
1228 case TargetOpcode::G_STORE: { in fewerElementsVector()
1229 bool IsLoad = MI.getOpcode() == TargetOpcode::G_LOAD; in fewerElementsVector()
1283 case TargetOpcode::G_CTLZ_ZERO_UNDEF: { in lowerBitCount()
1286 MI.setDesc(TII.get(TargetOpcode::G_CTLZ)); in lowerBitCount()
1290 case TargetOpcode::G_CTLZ: { in lowerBitCount()
1293 if (isSupported({TargetOpcode::G_CTLZ_ZERO_UNDEF, {Ty}})) { in lowerBitCount()
1295 auto MIBCtlzZU = MIRBuilder.buildInstr(TargetOpcode::G_CTLZ_ZERO_UNDEF, in lowerBitCount()
1322 TargetOpcode::G_OR, {Ty}, in lowerBitCount()
1323 {Op, MIRBuilder.buildInstr(TargetOpcode::G_LSHR, {Ty}, in lowerBitCount()
1327 auto MIBPop = MIRBuilder.buildInstr(TargetOpcode::G_CTPOP, {Ty}, {Op}); in lowerBitCount()
1328 MIRBuilder.buildInstr(TargetOpcode::G_SUB, {MI.getOperand(0).getReg()}, in lowerBitCount()
1333 case TargetOpcode::G_CTTZ_ZERO_UNDEF: { in lowerBitCount()
1336 MI.setDesc(TII.get(TargetOpcode::G_CTTZ)); in lowerBitCount()
1340 case TargetOpcode::G_CTTZ: { in lowerBitCount()
1343 if (isSupported({TargetOpcode::G_CTTZ_ZERO_UNDEF, {Ty}})) { in lowerBitCount()
1346 auto MIBCttzZU = MIRBuilder.buildInstr(TargetOpcode::G_CTTZ_ZERO_UNDEF, in lowerBitCount()
1363 MIRBuilder.buildInstr(TargetOpcode::G_XOR, {Ty}, {SrcReg, MIBCstNeg1}); in lowerBitCount()
1365 TargetOpcode::G_AND, {Ty}, in lowerBitCount()
1366 {MIBNot, MIRBuilder.buildInstr(TargetOpcode::G_ADD, {Ty}, in lowerBitCount()
1368 if (!isSupported({TargetOpcode::G_CTPOP, {Ty}}) && in lowerBitCount()
1369 isSupported({TargetOpcode::G_CTLZ, {Ty}})) { in lowerBitCount()
1372 TargetOpcode::G_SUB, {MI.getOperand(0).getReg()}, in lowerBitCount()
1374 MIRBuilder.buildInstr(TargetOpcode::G_CTLZ, {Ty}, {MIBTmp})}); in lowerBitCount()
1378 MI.setDesc(TII.get(TargetOpcode::G_CTPOP)); in lowerBitCount()