Lines Matching refs:getOrCreateVReg
320 unsigned Op0 = getOrCreateVReg(*U.getOperand(0)); in translateBinaryOp()
321 unsigned Op1 = getOrCreateVReg(*U.getOperand(1)); in translateBinaryOp()
322 unsigned Res = getOrCreateVReg(U); in translateBinaryOp()
337 .addDef(getOrCreateVReg(U)) in translateFSub()
338 .addUse(getOrCreateVReg(*U.getOperand(1))); in translateFSub()
346 .addDef(getOrCreateVReg(U)) in translateFNeg()
347 .addUse(getOrCreateVReg(*U.getOperand(1))); in translateFNeg()
354 unsigned Op0 = getOrCreateVReg(*U.getOperand(0)); in translateCompare()
355 unsigned Op1 = getOrCreateVReg(*U.getOperand(1)); in translateCompare()
356 unsigned Res = getOrCreateVReg(U); in translateCompare()
364 Res, getOrCreateVReg(*Constant::getNullValue(CI->getType()))); in translateCompare()
367 Res, getOrCreateVReg(*Constant::getAllOnesValue(CI->getType()))); in translateCompare()
398 unsigned Tst = getOrCreateVReg(*BrInst.getCondition()); in translateBr()
428 const unsigned SwCondValue = getOrCreateVReg(*SwInst.getCondition()); in translateSwitch()
433 const unsigned CaseValueReg = getOrCreateVReg(*CaseIt.getCaseValue()); in translateSwitch()
468 const unsigned Tgt = getOrCreateVReg(*BrInst.getAddress()); in translateIndirectBr()
491 unsigned Base = getOrCreateVReg(*LI.getPointerOperand()); in translateLoad()
520 unsigned Base = getOrCreateVReg(*SI.getPointerOperand()); in translateStore()
599 unsigned Tst = getOrCreateVReg(*U.getOperand(0)); in translateSelect()
622 unsigned SrcReg = getOrCreateVReg(*U.getOperand(0)); in translateBitCast()
639 unsigned Op = getOrCreateVReg(*U.getOperand(0)); in translateCast()
640 unsigned Res = getOrCreateVReg(U); in translateCast()
652 unsigned BaseReg = getOrCreateVReg(Op0); in translateGetElementPtr()
679 getOrCreateVReg(*ConstantInt::get(OffsetIRTy, Offset)); in translateGetElementPtr()
686 unsigned IdxReg = getOrCreateVReg(*Idx); in translateGetElementPtr()
698 getOrCreateVReg(*ConstantInt::get(OffsetIRTy, ElementSize)); in translateGetElementPtr()
712 unsigned OffsetReg = getOrCreateVReg(*ConstantInt::get(OffsetIRTy, Offset)); in translateGetElementPtr()
713 MIRBuilder.buildGEP(getOrCreateVReg(U), BaseReg, OffsetReg); in translateGetElementPtr()
717 MIRBuilder.buildCopy(getOrCreateVReg(U), BaseReg); in translateGetElementPtr()
733 Args.emplace_back(getOrCreateVReg(*Arg), Arg->getType()); in translateMemfunc()
785 .addUse(getOrCreateVReg(*CI.getOperand(0))) in translateOverflowIntrinsic()
786 .addUse(getOrCreateVReg(*CI.getOperand(1))); in translateOverflowIntrinsic()
826 MIRBuilder.buildIndirectDbgValue(getOrCreateVReg(*Address), in translateKnownIntrinsic()
852 .addUse(getOrCreateVReg(*Ptr)) in translateKnownIntrinsic()
871 unsigned Reg = getOrCreateVReg(*V); in translateKnownIntrinsic()
894 .addDef(getOrCreateVReg(CI)) in translateKnownIntrinsic()
895 .addUse(getOrCreateVReg(*CI.getArgOperand(0))) in translateKnownIntrinsic()
896 .addUse(getOrCreateVReg(*CI.getArgOperand(1))); in translateKnownIntrinsic()
902 .addDef(getOrCreateVReg(CI)) in translateKnownIntrinsic()
903 .addUse(getOrCreateVReg(*CI.getArgOperand(0))); in translateKnownIntrinsic()
909 .addDef(getOrCreateVReg(CI)) in translateKnownIntrinsic()
910 .addUse(getOrCreateVReg(*CI.getArgOperand(0))); in translateKnownIntrinsic()
916 .addDef(getOrCreateVReg(CI)) in translateKnownIntrinsic()
917 .addUse(getOrCreateVReg(*CI.getArgOperand(0))); in translateKnownIntrinsic()
923 .addDef(getOrCreateVReg(CI)) in translateKnownIntrinsic()
924 .addUse(getOrCreateVReg(*CI.getArgOperand(0))); in translateKnownIntrinsic()
930 .addDef(getOrCreateVReg(CI)) in translateKnownIntrinsic()
931 .addUse(getOrCreateVReg(*CI.getArgOperand(0))); in translateKnownIntrinsic()
937 .addDef(getOrCreateVReg(CI)) in translateKnownIntrinsic()
938 .addUse(getOrCreateVReg(*CI.getArgOperand(0))); in translateKnownIntrinsic()
944 .addDef(getOrCreateVReg(CI)) in translateKnownIntrinsic()
945 .addUse(getOrCreateVReg(*CI.getArgOperand(0))); in translateKnownIntrinsic()
949 .addDef(getOrCreateVReg(CI)) in translateKnownIntrinsic()
950 .addUse(getOrCreateVReg(*CI.getArgOperand(0))); in translateKnownIntrinsic()
954 .addDef(getOrCreateVReg(CI)) in translateKnownIntrinsic()
955 .addUse(getOrCreateVReg(*CI.getArgOperand(0))) in translateKnownIntrinsic()
956 .addUse(getOrCreateVReg(*CI.getArgOperand(1))) in translateKnownIntrinsic()
957 .addUse(getOrCreateVReg(*CI.getArgOperand(2))); in translateKnownIntrinsic()
964 unsigned Dst = getOrCreateVReg(CI); in translateKnownIntrinsic()
965 unsigned Op0 = getOrCreateVReg(*CI.getArgOperand(0)); in translateKnownIntrinsic()
966 unsigned Op1 = getOrCreateVReg(*CI.getArgOperand(1)); in translateKnownIntrinsic()
967 unsigned Op2 = getOrCreateVReg(*CI.getArgOperand(2)); in translateKnownIntrinsic()
989 unsigned Reg = getOrCreateVReg(CI); in translateKnownIntrinsic()
998 MIRBuilder.buildConstant(getOrCreateVReg(CI), Min->isZero() ? -1ULL : 0); in translateKnownIntrinsic()
1004 MIRBuilder.buildConstant(getOrCreateVReg(CI), 0); in translateKnownIntrinsic()
1007 getStackGuard(getOrCreateVReg(CI), MIRBuilder); in translateKnownIntrinsic()
1019 GuardVal, getOrCreateVReg(*Slot), in translateKnownIntrinsic()
1036 .addDef(getOrCreateVReg(CI)) in translateKnownIntrinsic()
1037 .addUse(getOrCreateVReg(*CI.getArgOperand(0))); in translateKnownIntrinsic()
1042 .addDef(getOrCreateVReg(CI)) in translateKnownIntrinsic()
1043 .addUse(getOrCreateVReg(*CI.getArgOperand(0))); in translateKnownIntrinsic()
1056 .addDef(getOrCreateVReg(CI)) in translateKnownIntrinsic()
1057 .addUse(getOrCreateVReg(*CI.getArgOperand(0))); in translateKnownIntrinsic()
1133 : getOrCreateVReg(CI); in translateCall()
1141 return getOrCreateVReg(*CI.getCalledValue()); in translateCall()
1160 Res = getOrCreateVReg(CI); in translateCall()
1225 [&]() { return getOrCreateVReg(*I.getCalledValue()); })) in translateInvoke()
1310 unsigned Res = getOrCreateVReg(AI); in translateAlloca()
1325 unsigned NumElts = getOrCreateVReg(*AI.getArraySize()); in translateAlloca()
1337 getOrCreateVReg(*ConstantInt::get(IntPtrIRTy, -DL->getTypeAllocSize(Ty))); in translateAlloca()
1366 MIRBuilder.buildCopy(getOrCreateVReg(AI), AllocTmp); in translateAlloca()
1379 .addDef(getOrCreateVReg(U)) in translateVAArg()
1380 .addUse(getOrCreateVReg(*U.getOperand(0))) in translateVAArg()
1390 unsigned Elt = getOrCreateVReg(*U.getOperand(1)); in translateInsertElement()
1401 unsigned Res = getOrCreateVReg(U); in translateInsertElement()
1402 unsigned Val = getOrCreateVReg(*U.getOperand(0)); in translateInsertElement()
1403 unsigned Elt = getOrCreateVReg(*U.getOperand(1)); in translateInsertElement()
1404 unsigned Idx = getOrCreateVReg(*U.getOperand(2)); in translateInsertElement()
1414 unsigned Elt = getOrCreateVReg(*U.getOperand(0)); in translateExtractElement()
1424 unsigned Res = getOrCreateVReg(U); in translateExtractElement()
1425 unsigned Val = getOrCreateVReg(*U.getOperand(0)); in translateExtractElement()
1433 Idx = getOrCreateVReg(*NewIdxCI); in translateExtractElement()
1437 Idx = getOrCreateVReg(*U.getOperand(1)); in translateExtractElement()
1449 .addDef(getOrCreateVReg(U)) in translateShuffleVector()
1450 .addUse(getOrCreateVReg(*U.getOperand(0))) in translateShuffleVector()
1451 .addUse(getOrCreateVReg(*U.getOperand(1))) in translateShuffleVector()
1452 .addUse(getOrCreateVReg(*U.getOperand(2))); in translateShuffleVector()
1486 unsigned Addr = getOrCreateVReg(*I.getPointerOperand()); in translateAtomicCmpXchg()
1487 unsigned Cmp = getOrCreateVReg(*I.getCompareOperand()); in translateAtomicCmpXchg()
1488 unsigned NewVal = getOrCreateVReg(*I.getNewValOperand()); in translateAtomicCmpXchg()
1510 unsigned Res = getOrCreateVReg(I); in translateAtomicRMW()
1511 unsigned Addr = getOrCreateVReg(*I.getPointerOperand()); in translateAtomicRMW()
1512 unsigned Val = getOrCreateVReg(*I.getValOperand()); in translateAtomicRMW()
1638 unsigned ZeroReg = getOrCreateVReg(*ZeroVal); in translate()
1651 Ops.push_back(getOrCreateVReg(Elt)); in translate()
1661 Ops.push_back(getOrCreateVReg(Elt)); in translate()
1678 Ops.push_back(getOrCreateVReg(*CV->getOperand(i))); in translate()