Lines Matching refs:write_cpu_ctrl
244 write_cpu_ctrl(sc->config->bridge_irq_cause, irq_cause); in mv_timer_attach()
248 write_cpu_ctrl(BRIDGE_IRQ_MASK, irq_mask); in mv_timer_attach()
278 write_cpu_ctrl(timer_softc->config->bridge_irq_cause, irq_cause); in mv_hardclock()
395 write_cpu_ctrl(timer_softc->config->bridge_irq_cause, irq_cause); in mv_watchdog_enable_armv5()
399 write_cpu_ctrl(BRIDGE_IRQ_MASK, irq_mask); in mv_watchdog_enable_armv5()
403 write_cpu_ctrl(RSTOUTn_MASK, val); in mv_watchdog_enable_armv5()
417 write_cpu_ctrl(timer_softc->config->bridge_irq_cause, irq_cause); in mv_watchdog_enable_armadaxp()
443 write_cpu_ctrl(RSTOUTn_MASK, val); in mv_watchdog_disable_armv5()
447 write_cpu_ctrl(BRIDGE_IRQ_MASK, irq_mask); in mv_watchdog_disable_armv5()
451 write_cpu_ctrl(timer_softc->config->bridge_irq_cause, irq_cause); in mv_watchdog_disable_armv5()
469 write_cpu_ctrl(timer_softc->config->bridge_irq_cause, irq_cause); in mv_watchdog_disable_armadaxp()