Lines Matching refs:info

214 mlx5_set_default_params(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)  in mlx5_set_default_params()  argument
219 info->default_rxportconf.ring_size = 256; in mlx5_set_default_params()
220 info->default_txportconf.ring_size = 256; in mlx5_set_default_params()
221 info->default_rxportconf.burst_size = MLX5_RX_DEFAULT_BURST; in mlx5_set_default_params()
222 info->default_txportconf.burst_size = MLX5_TX_DEFAULT_BURST; in mlx5_set_default_params()
225 info->default_rxportconf.nb_queues = 16; in mlx5_set_default_params()
226 info->default_txportconf.nb_queues = 16; in mlx5_set_default_params()
230 info->default_rxportconf.ring_size = 2048; in mlx5_set_default_params()
231 info->default_txportconf.ring_size = 2048; in mlx5_set_default_params()
234 info->default_rxportconf.nb_queues = 8; in mlx5_set_default_params()
235 info->default_txportconf.nb_queues = 8; in mlx5_set_default_params()
239 info->default_rxportconf.ring_size = 4096; in mlx5_set_default_params()
240 info->default_txportconf.ring_size = 4096; in mlx5_set_default_params()
254 mlx5_set_txlimit_params(struct rte_eth_dev *dev, struct rte_eth_dev_info *info) in mlx5_set_txlimit_params() argument
277 info->tx_desc_lim.nb_seg_max = nb_max; in mlx5_set_txlimit_params()
278 info->tx_desc_lim.nb_mtu_seg_max = nb_max; in mlx5_set_txlimit_params()
290 mlx5_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info) in mlx5_dev_infos_get() argument
297 info->min_rx_bufsize = 32; in mlx5_dev_infos_get()
298 info->max_rx_pktlen = 65536; in mlx5_dev_infos_get()
299 info->max_lro_pkt_size = MLX5_MAX_LRO_SIZE; in mlx5_dev_infos_get()
308 info->max_rx_queues = max; in mlx5_dev_infos_get()
309 info->max_tx_queues = max; in mlx5_dev_infos_get()
310 info->max_mac_addrs = MLX5_MAX_UC_MAC_ADDRESSES; in mlx5_dev_infos_get()
311 info->rx_queue_offload_capa = mlx5_get_rx_queue_offloads(dev); in mlx5_dev_infos_get()
312 info->rx_seg_capa.max_nseg = MLX5_MAX_RXQ_NSEG; in mlx5_dev_infos_get()
313 info->rx_seg_capa.multi_pools = 1; in mlx5_dev_infos_get()
314 info->rx_seg_capa.offset_allowed = 1; in mlx5_dev_infos_get()
315 info->rx_seg_capa.offset_align_log2 = 0; in mlx5_dev_infos_get()
316 info->rx_offload_capa = (mlx5_get_rx_port_offloads() | in mlx5_dev_infos_get()
317 info->rx_queue_offload_capa); in mlx5_dev_infos_get()
318 info->tx_offload_capa = mlx5_get_tx_port_offloads(dev); in mlx5_dev_infos_get()
319 info->if_index = mlx5_ifindex(dev); in mlx5_dev_infos_get()
320 info->reta_size = priv->reta_idx_n ? in mlx5_dev_infos_get()
322 info->hash_key_size = MLX5_RSS_HASH_KEY_LEN; in mlx5_dev_infos_get()
323 info->speed_capa = priv->link_speed_capa; in mlx5_dev_infos_get()
324 info->flow_type_rss_offloads = ~MLX5_RSS_HF_MASK; in mlx5_dev_infos_get()
325 mlx5_set_default_params(dev, info); in mlx5_dev_infos_get()
326 mlx5_set_txlimit_params(dev, info); in mlx5_dev_infos_get()
327 info->switch_info.name = dev->data->name; in mlx5_dev_infos_get()
328 info->switch_info.domain_id = priv->domain_id; in mlx5_dev_infos_get()
329 info->switch_info.port_id = priv->representor_id; in mlx5_dev_infos_get()
342 if ((info->switch_info.port_id != 0xffff && in mlx5_dev_infos_get()
343 info->switch_info.port_id >= in mlx5_dev_infos_get()
355 if (info->switch_info.port_id == 0xffff) in mlx5_dev_infos_get()
356 info->switch_info.port_id = 0xfff; in mlx5_dev_infos_get()
357 info->switch_info.port_id |= in mlx5_dev_infos_get()
373 info->switch_info.name = opriv->dev_data->name; in mlx5_dev_infos_get()