317 				   struct rte_eth_dcb_info *dcb_info);
7427 			struct rte_eth_dcb_info *dcb_info)  in ixgbe_dev_get_dcb_info()  argument
7437 		dcb_info->nb_tcs = dcb_config->num_tcs.pg_tcs;  in ixgbe_dev_get_dcb_info()
7439 		dcb_info->nb_tcs = 1;  in ixgbe_dev_get_dcb_info()
7441 	tc_queue = &dcb_info->tc_queue;  in ixgbe_dev_get_dcb_info()
7442 	nb_tcs = dcb_info->nb_tcs;  in ixgbe_dev_get_dcb_info()
7448 			dcb_info->prio_tc[i] = vmdq_rx_conf->dcb_tc[i];  in ixgbe_dev_get_dcb_info()
7472 			dcb_info->prio_tc[i] = rx_conf->dcb_tc[i];  in ixgbe_dev_get_dcb_info()
7473 		if (dcb_info->nb_tcs == ETH_4_TCS) {  in ixgbe_dev_get_dcb_info()
7474 			for (i = 0; i < dcb_info->nb_tcs; i++) {  in ixgbe_dev_get_dcb_info()
7475 				dcb_info->tc_queue.tc_rxq[0][i].base = i * 32;  in ixgbe_dev_get_dcb_info()
7476 				dcb_info->tc_queue.tc_rxq[0][i].nb_queue = 16;  in ixgbe_dev_get_dcb_info()
7478 			dcb_info->tc_queue.tc_txq[0][0].base = 0;  in ixgbe_dev_get_dcb_info()
7479 			dcb_info->tc_queue.tc_txq[0][1].base = 64;  in ixgbe_dev_get_dcb_info()
7480 			dcb_info->tc_queue.tc_txq[0][2].base = 96;  in ixgbe_dev_get_dcb_info()
7481 			dcb_info->tc_queue.tc_txq[0][3].base = 112;  in ixgbe_dev_get_dcb_info()
7482 			dcb_info->tc_queue.tc_txq[0][0].nb_queue = 64;  in ixgbe_dev_get_dcb_info()
7483 			dcb_info->tc_queue.tc_txq[0][1].nb_queue = 32;  in ixgbe_dev_get_dcb_info()
7484 			dcb_info->tc_queue.tc_txq[0][2].nb_queue = 16;  in ixgbe_dev_get_dcb_info()
7485 			dcb_info->tc_queue.tc_txq[0][3].nb_queue = 16;  in ixgbe_dev_get_dcb_info()
7486 		} else if (dcb_info->nb_tcs == ETH_8_TCS) {  in ixgbe_dev_get_dcb_info()
7487 			for (i = 0; i < dcb_info->nb_tcs; i++) {  in ixgbe_dev_get_dcb_info()
7488 				dcb_info->tc_queue.tc_rxq[0][i].base = i * 16;  in ixgbe_dev_get_dcb_info()
7489 				dcb_info->tc_queue.tc_rxq[0][i].nb_queue = 16;  in ixgbe_dev_get_dcb_info()
7491 			dcb_info->tc_queue.tc_txq[0][0].base = 0;  in ixgbe_dev_get_dcb_info()
7492 			dcb_info->tc_queue.tc_txq[0][1].base = 32;  in ixgbe_dev_get_dcb_info()
7493 			dcb_info->tc_queue.tc_txq[0][2].base = 64;  in ixgbe_dev_get_dcb_info()
7494 			dcb_info->tc_queue.tc_txq[0][3].base = 80;  in ixgbe_dev_get_dcb_info()
7495 			dcb_info->tc_queue.tc_txq[0][4].base = 96;  in ixgbe_dev_get_dcb_info()
7496 			dcb_info->tc_queue.tc_txq[0][5].base = 104;  in ixgbe_dev_get_dcb_info()
7497 			dcb_info->tc_queue.tc_txq[0][6].base = 112;  in ixgbe_dev_get_dcb_info()
7498 			dcb_info->tc_queue.tc_txq[0][7].base = 120;  in ixgbe_dev_get_dcb_info()
7499 			dcb_info->tc_queue.tc_txq[0][0].nb_queue = 32;  in ixgbe_dev_get_dcb_info()
7500 			dcb_info->tc_queue.tc_txq[0][1].nb_queue = 32;  in ixgbe_dev_get_dcb_info()
7501 			dcb_info->tc_queue.tc_txq[0][2].nb_queue = 16;  in ixgbe_dev_get_dcb_info()
7502 			dcb_info->tc_queue.tc_txq[0][3].nb_queue = 16;  in ixgbe_dev_get_dcb_info()
7503 			dcb_info->tc_queue.tc_txq[0][4].nb_queue = 8;  in ixgbe_dev_get_dcb_info()
7504 			dcb_info->tc_queue.tc_txq[0][5].nb_queue = 8;  in ixgbe_dev_get_dcb_info()
7505 			dcb_info->tc_queue.tc_txq[0][6].nb_queue = 8;  in ixgbe_dev_get_dcb_info()
7506 			dcb_info->tc_queue.tc_txq[0][7].nb_queue = 8;  in ixgbe_dev_get_dcb_info()
7509 	for (i = 0; i < dcb_info->nb_tcs; i++) {  in ixgbe_dev_get_dcb_info()
7511 		dcb_info->tc_bws[i] = tc->path[IXGBE_DCB_TX_CONFIG].bwg_percent;  in ixgbe_dev_get_dcb_info()