Lines Matching refs:reg_val
1076 uint32_t reg_val; in eth_igc_start() local
1078 reg_val = IGC_READ_REG(hw, IGC_CTRL); in eth_igc_start()
1079 reg_val &= ~IGC_CTRL_SPEED_MASK; in eth_igc_start()
1080 reg_val |= IGC_CTRL_SLU | IGC_CTRL_FRCSPD | in eth_igc_start()
1082 IGC_WRITE_REG(hw, IGC_CTRL, reg_val); in eth_igc_start()
2455 uint32_t reg_val; in igc_vlan_hw_filter_enable() local
2459 reg_val = IGC_READ_REG(hw, IGC_RCTL); in igc_vlan_hw_filter_enable()
2460 reg_val &= ~IGC_RCTL_CFIEN; in igc_vlan_hw_filter_enable()
2461 reg_val |= IGC_RCTL_VFE; in igc_vlan_hw_filter_enable()
2462 IGC_WRITE_REG(hw, IGC_RCTL, reg_val); in igc_vlan_hw_filter_enable()
2587 uint32_t reg_val; in eth_igc_vlan_tpid_set() local
2591 reg_val = IGC_READ_REG(hw, IGC_VET); in eth_igc_vlan_tpid_set()
2592 reg_val = (reg_val & (~IGC_VET_EXT)) | in eth_igc_vlan_tpid_set()
2594 IGC_WRITE_REG(hw, IGC_VET, reg_val); in eth_igc_vlan_tpid_set()