Lines Matching refs:pdata
107 axgbe_set_tstamp_time(struct axgbe_port *pdata, unsigned int sec,
110 axgbe_update_tstamp_addend(struct axgbe_port *pdata,
262 static int axgbe_phy_reset(struct axgbe_port *pdata) in axgbe_phy_reset() argument
264 pdata->phy_link = -1; in axgbe_phy_reset()
265 pdata->phy_speed = SPEED_UNKNOWN; in axgbe_phy_reset()
266 return pdata->phy_if.phy_reset(pdata); in axgbe_phy_reset()
285 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_dev_interrupt_handler() local
288 pdata->phy_if.an_isr(pdata); in axgbe_dev_interrupt_handler()
290 dma_isr = AXGMAC_IOREAD(pdata, DMA_ISR); in axgbe_dev_interrupt_handler()
296 pdata->rx_queues[0], in axgbe_dev_interrupt_handler()
300 pdata->rx_queues[0], in axgbe_dev_interrupt_handler()
305 rte_intr_ack(&pdata->pci_dev->intr_handle); in axgbe_dev_interrupt_handler()
315 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_dev_configure() local
317 pdata->rx_csum_enable = dev->data->dev_conf.rxmode.offloads & in axgbe_dev_configure()
325 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_dev_rx_mq_config() local
328 pdata->rss_enable = 1; in axgbe_dev_rx_mq_config()
330 pdata->rss_enable = 0; in axgbe_dev_rx_mq_config()
339 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_dev_start() local
354 ret = axgbe_phy_reset(pdata); in axgbe_dev_start()
359 ret = pdata->hw_if.init(pdata); in axgbe_dev_start()
366 rte_intr_enable(&pdata->pci_dev->intr_handle); in axgbe_dev_start()
369 pdata->phy_if.phy_start(pdata); in axgbe_dev_start()
373 rte_bit_relaxed_clear32(AXGBE_STOPPED, &pdata->dev_state); in axgbe_dev_start()
374 rte_bit_relaxed_clear32(AXGBE_DOWN, &pdata->dev_state); in axgbe_dev_start()
376 max_pkt_len > pdata->rx_buf_size) in axgbe_dev_start()
392 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_dev_stop() local
396 rte_intr_disable(&pdata->pci_dev->intr_handle); in axgbe_dev_stop()
398 if (rte_bit_relaxed_get32(AXGBE_STOPPED, &pdata->dev_state)) in axgbe_dev_stop()
401 rte_bit_relaxed_set32(AXGBE_STOPPED, &pdata->dev_state); in axgbe_dev_stop()
405 pdata->phy_if.phy_stop(pdata); in axgbe_dev_stop()
406 pdata->hw_if.exit(pdata); in axgbe_dev_stop()
408 rte_bit_relaxed_set32(AXGBE_DOWN, &pdata->dev_state); in axgbe_dev_stop()
416 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_dev_promiscuous_enable() local
420 AXGMAC_IOWRITE_BITS(pdata, MAC_PFR, PR, 1); in axgbe_dev_promiscuous_enable()
428 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_dev_promiscuous_disable() local
432 AXGMAC_IOWRITE_BITS(pdata, MAC_PFR, PR, 0); in axgbe_dev_promiscuous_disable()
440 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_dev_allmulticast_enable() local
444 if (AXGMAC_IOREAD_BITS(pdata, MAC_PFR, PM)) in axgbe_dev_allmulticast_enable()
446 AXGMAC_IOWRITE_BITS(pdata, MAC_PFR, PM, 1); in axgbe_dev_allmulticast_enable()
454 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_dev_allmulticast_disable() local
458 if (!AXGMAC_IOREAD_BITS(pdata, MAC_PFR, PM)) in axgbe_dev_allmulticast_disable()
460 AXGMAC_IOWRITE_BITS(pdata, MAC_PFR, PM, 0); in axgbe_dev_allmulticast_disable()
468 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_dev_mac_addr_set() local
471 axgbe_set_mac_addn_addr(pdata, (u8 *)mac_addr, 0); in axgbe_dev_mac_addr_set()
480 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_dev_mac_addr_add() local
481 struct axgbe_hw_features *hw_feat = &pdata->hw_feat; in axgbe_dev_mac_addr_add()
487 axgbe_set_mac_addn_addr(pdata, (u8 *)mac_addr, index); in axgbe_dev_mac_addr_add()
496 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_dev_rss_reta_update() local
500 if (!pdata->rss_enable) { in axgbe_dev_rss_reta_update()
515 pdata->rss_table[i] = reta_conf[idx].reta[shift]; in axgbe_dev_rss_reta_update()
519 ret = axgbe_write_rss_lookup_table(pdata); in axgbe_dev_rss_reta_update()
528 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_dev_rss_reta_query() local
531 if (!pdata->rss_enable) { in axgbe_dev_rss_reta_query()
546 reta_conf[idx].reta[shift] = pdata->rss_table[i]; in axgbe_dev_rss_reta_query()
555 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_dev_rss_hash_update() local
558 if (!pdata->rss_enable) { in axgbe_dev_rss_hash_update()
570 rte_memcpy(pdata->rss_key, rss_conf->rss_key, in axgbe_dev_rss_hash_update()
573 ret = axgbe_write_rss_hash_key(pdata); in axgbe_dev_rss_hash_update()
578 pdata->rss_hf = rss_conf->rss_hf & AXGBE_RSS_OFFLOAD; in axgbe_dev_rss_hash_update()
580 if (pdata->rss_hf & (ETH_RSS_IPV4 | ETH_RSS_IPV6)) in axgbe_dev_rss_hash_update()
581 AXGMAC_SET_BITS(pdata->rss_options, MAC_RSSCR, IP2TE, 1); in axgbe_dev_rss_hash_update()
582 if (pdata->rss_hf & in axgbe_dev_rss_hash_update()
584 AXGMAC_SET_BITS(pdata->rss_options, MAC_RSSCR, TCP4TE, 1); in axgbe_dev_rss_hash_update()
585 if (pdata->rss_hf & in axgbe_dev_rss_hash_update()
587 AXGMAC_SET_BITS(pdata->rss_options, MAC_RSSCR, UDP4TE, 1); in axgbe_dev_rss_hash_update()
590 AXGMAC_IOWRITE(pdata, MAC_RSSCR, pdata->rss_options); in axgbe_dev_rss_hash_update()
599 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_dev_rss_hash_conf_get() local
601 if (!pdata->rss_enable) { in axgbe_dev_rss_hash_conf_get()
613 rte_memcpy(rss_conf->rss_key, pdata->rss_key, in axgbe_dev_rss_hash_conf_get()
617 rss_conf->rss_hf = pdata->rss_hf; in axgbe_dev_rss_hash_conf_get()
624 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_dev_mac_addr_remove() local
625 struct axgbe_hw_features *hw_feat = &pdata->hw_feat; in axgbe_dev_mac_addr_remove()
631 axgbe_set_mac_addn_addr(pdata, NULL, index); in axgbe_dev_mac_addr_remove()
639 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_dev_set_mc_addr_list() local
640 struct axgbe_hw_features *hw_feat = &pdata->hw_feat; in axgbe_dev_set_mc_addr_list()
658 axgbe_set_mac_addn_addr(pdata, (u8 *)mc_addr_set++, index++); in axgbe_dev_set_mc_addr_list()
667 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_dev_uc_hash_table_set() local
668 struct axgbe_hw_features *hw_feat = &pdata->hw_feat; in axgbe_dev_uc_hash_table_set()
675 axgbe_set_mac_hash_table(pdata, (u8 *)mac_addr, add); in axgbe_dev_uc_hash_table_set()
677 if (pdata->uc_hash_mac_addr > 0) { in axgbe_dev_uc_hash_table_set()
678 AXGMAC_IOWRITE_BITS(pdata, MAC_PFR, HPF, 1); in axgbe_dev_uc_hash_table_set()
679 AXGMAC_IOWRITE_BITS(pdata, MAC_PFR, HUC, 1); in axgbe_dev_uc_hash_table_set()
681 AXGMAC_IOWRITE_BITS(pdata, MAC_PFR, HPF, 0); in axgbe_dev_uc_hash_table_set()
682 AXGMAC_IOWRITE_BITS(pdata, MAC_PFR, HUC, 0); in axgbe_dev_uc_hash_table_set()
690 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_dev_uc_all_hash_table_set() local
691 struct axgbe_hw_features *hw_feat = &pdata->hw_feat; in axgbe_dev_uc_all_hash_table_set()
699 for (index = 0; index < pdata->hash_table_count; index++) { in axgbe_dev_uc_all_hash_table_set()
701 pdata->uc_hash_table[index] = ~0; in axgbe_dev_uc_all_hash_table_set()
703 pdata->uc_hash_table[index] = 0; in axgbe_dev_uc_all_hash_table_set()
708 AXGMAC_IOWRITE(pdata, MAC_HTR(index), in axgbe_dev_uc_all_hash_table_set()
709 pdata->uc_hash_table[index]); in axgbe_dev_uc_all_hash_table_set()
713 AXGMAC_IOWRITE_BITS(pdata, MAC_PFR, HPF, 1); in axgbe_dev_uc_all_hash_table_set()
714 AXGMAC_IOWRITE_BITS(pdata, MAC_PFR, HUC, 1); in axgbe_dev_uc_all_hash_table_set()
716 AXGMAC_IOWRITE_BITS(pdata, MAC_PFR, HPF, 0); in axgbe_dev_uc_all_hash_table_set()
717 AXGMAC_IOWRITE_BITS(pdata, MAC_PFR, HUC, 0); in axgbe_dev_uc_all_hash_table_set()
727 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_dev_link_update() local
734 pdata->phy_if.phy_status(pdata); in axgbe_dev_link_update()
737 link.link_duplex = pdata->phy.duplex; in axgbe_dev_link_update()
738 link.link_status = pdata->phy_link; in axgbe_dev_link_update()
739 link.link_speed = pdata->phy_speed; in axgbe_dev_link_update()
752 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_dev_get_regs() local
755 regs->length = axgbe_regs_get_count(pdata); in axgbe_dev_get_regs()
762 regs->length != (uint32_t)axgbe_regs_get_count(pdata)) in axgbe_dev_get_regs()
765 regs->version = pdata->pci_dev->id.vendor_id << 16 | in axgbe_dev_get_regs()
766 pdata->pci_dev->id.device_id; in axgbe_dev_get_regs()
767 axgbe_regs_dump(pdata, regs->data); in axgbe_dev_get_regs()
770 static void axgbe_read_mmc_stats(struct axgbe_port *pdata) in axgbe_read_mmc_stats() argument
772 struct axgbe_mmc_stats *stats = &pdata->mmc_stats; in axgbe_read_mmc_stats()
775 AXGMAC_IOWRITE_BITS(pdata, MMC_CR, MCF, 1); in axgbe_read_mmc_stats()
779 AXGMAC_IOREAD(pdata, MMC_TXOCTETCOUNT_GB_LO); in axgbe_read_mmc_stats()
781 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_TXOCTETCOUNT_GB_HI) << 32); in axgbe_read_mmc_stats()
784 AXGMAC_IOREAD(pdata, MMC_TXFRAMECOUNT_GB_LO); in axgbe_read_mmc_stats()
786 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_TXFRAMECOUNT_GB_HI) << 32); in axgbe_read_mmc_stats()
789 AXGMAC_IOREAD(pdata, MMC_TXBROADCASTFRAMES_G_LO); in axgbe_read_mmc_stats()
791 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_TXBROADCASTFRAMES_G_HI) << 32); in axgbe_read_mmc_stats()
794 AXGMAC_IOREAD(pdata, MMC_TXMULTICASTFRAMES_G_LO); in axgbe_read_mmc_stats()
796 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_TXMULTICASTFRAMES_G_HI) << 32); in axgbe_read_mmc_stats()
799 AXGMAC_IOREAD(pdata, MMC_TX64OCTETS_GB_LO); in axgbe_read_mmc_stats()
801 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_TX64OCTETS_GB_HI) << 32); in axgbe_read_mmc_stats()
804 AXGMAC_IOREAD(pdata, MMC_TX65TO127OCTETS_GB_LO); in axgbe_read_mmc_stats()
806 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_TX65TO127OCTETS_GB_HI) << 32); in axgbe_read_mmc_stats()
809 AXGMAC_IOREAD(pdata, MMC_TX128TO255OCTETS_GB_LO); in axgbe_read_mmc_stats()
811 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_TX128TO255OCTETS_GB_HI) << 32); in axgbe_read_mmc_stats()
814 AXGMAC_IOREAD(pdata, MMC_TX256TO511OCTETS_GB_LO); in axgbe_read_mmc_stats()
816 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_TX256TO511OCTETS_GB_HI) << 32); in axgbe_read_mmc_stats()
819 AXGMAC_IOREAD(pdata, MMC_TX512TO1023OCTETS_GB_LO); in axgbe_read_mmc_stats()
821 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_TX512TO1023OCTETS_GB_HI) << 32); in axgbe_read_mmc_stats()
824 AXGMAC_IOREAD(pdata, MMC_TX1024TOMAXOCTETS_GB_LO); in axgbe_read_mmc_stats()
826 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_TX1024TOMAXOCTETS_GB_HI) << 32); in axgbe_read_mmc_stats()
829 AXGMAC_IOREAD(pdata, MMC_TXUNICASTFRAMES_GB_LO); in axgbe_read_mmc_stats()
831 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_TXUNICASTFRAMES_GB_HI) << 32); in axgbe_read_mmc_stats()
834 AXGMAC_IOREAD(pdata, MMC_TXMULTICASTFRAMES_GB_LO); in axgbe_read_mmc_stats()
836 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_TXMULTICASTFRAMES_GB_HI) << 32); in axgbe_read_mmc_stats()
839 AXGMAC_IOREAD(pdata, MMC_TXBROADCASTFRAMES_GB_LO); in axgbe_read_mmc_stats()
841 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_TXBROADCASTFRAMES_GB_HI) << 32); in axgbe_read_mmc_stats()
844 AXGMAC_IOREAD(pdata, MMC_TXUNDERFLOWERROR_LO); in axgbe_read_mmc_stats()
846 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_TXUNDERFLOWERROR_HI) << 32); in axgbe_read_mmc_stats()
849 AXGMAC_IOREAD(pdata, MMC_TXOCTETCOUNT_G_LO); in axgbe_read_mmc_stats()
851 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_TXOCTETCOUNT_G_HI) << 32); in axgbe_read_mmc_stats()
854 AXGMAC_IOREAD(pdata, MMC_TXFRAMECOUNT_G_LO); in axgbe_read_mmc_stats()
856 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_TXFRAMECOUNT_G_HI) << 32); in axgbe_read_mmc_stats()
859 AXGMAC_IOREAD(pdata, MMC_TXPAUSEFRAMES_LO); in axgbe_read_mmc_stats()
861 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_TXPAUSEFRAMES_HI) << 32); in axgbe_read_mmc_stats()
864 AXGMAC_IOREAD(pdata, MMC_TXVLANFRAMES_G_LO); in axgbe_read_mmc_stats()
866 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_TXVLANFRAMES_G_HI) << 32); in axgbe_read_mmc_stats()
870 AXGMAC_IOREAD(pdata, MMC_RXFRAMECOUNT_GB_LO); in axgbe_read_mmc_stats()
872 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_RXFRAMECOUNT_GB_HI) << 32); in axgbe_read_mmc_stats()
875 AXGMAC_IOREAD(pdata, MMC_RXOCTETCOUNT_GB_LO); in axgbe_read_mmc_stats()
877 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_RXOCTETCOUNT_GB_HI) << 32); in axgbe_read_mmc_stats()
880 AXGMAC_IOREAD(pdata, MMC_RXOCTETCOUNT_G_LO); in axgbe_read_mmc_stats()
882 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_RXOCTETCOUNT_G_HI) << 32); in axgbe_read_mmc_stats()
885 AXGMAC_IOREAD(pdata, MMC_RXBROADCASTFRAMES_G_LO); in axgbe_read_mmc_stats()
887 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_RXBROADCASTFRAMES_G_HI) << 32); in axgbe_read_mmc_stats()
890 AXGMAC_IOREAD(pdata, MMC_RXMULTICASTFRAMES_G_LO); in axgbe_read_mmc_stats()
892 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_RXMULTICASTFRAMES_G_HI) << 32); in axgbe_read_mmc_stats()
895 AXGMAC_IOREAD(pdata, MMC_RXCRCERROR_LO); in axgbe_read_mmc_stats()
897 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_RXCRCERROR_HI) << 32); in axgbe_read_mmc_stats()
900 AXGMAC_IOREAD(pdata, MMC_RXRUNTERROR); in axgbe_read_mmc_stats()
903 AXGMAC_IOREAD(pdata, MMC_RXJABBERERROR); in axgbe_read_mmc_stats()
906 AXGMAC_IOREAD(pdata, MMC_RXUNDERSIZE_G); in axgbe_read_mmc_stats()
909 AXGMAC_IOREAD(pdata, MMC_RXOVERSIZE_G); in axgbe_read_mmc_stats()
912 AXGMAC_IOREAD(pdata, MMC_RX64OCTETS_GB_LO); in axgbe_read_mmc_stats()
914 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_RX64OCTETS_GB_HI) << 32); in axgbe_read_mmc_stats()
917 AXGMAC_IOREAD(pdata, MMC_RX65TO127OCTETS_GB_LO); in axgbe_read_mmc_stats()
919 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_RX65TO127OCTETS_GB_HI) << 32); in axgbe_read_mmc_stats()
922 AXGMAC_IOREAD(pdata, MMC_RX128TO255OCTETS_GB_LO); in axgbe_read_mmc_stats()
924 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_RX128TO255OCTETS_GB_HI) << 32); in axgbe_read_mmc_stats()
927 AXGMAC_IOREAD(pdata, MMC_RX256TO511OCTETS_GB_LO); in axgbe_read_mmc_stats()
929 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_RX256TO511OCTETS_GB_HI) << 32); in axgbe_read_mmc_stats()
932 AXGMAC_IOREAD(pdata, MMC_RX512TO1023OCTETS_GB_LO); in axgbe_read_mmc_stats()
934 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_RX512TO1023OCTETS_GB_HI) << 32); in axgbe_read_mmc_stats()
937 AXGMAC_IOREAD(pdata, MMC_RX1024TOMAXOCTETS_GB_LO); in axgbe_read_mmc_stats()
939 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_RX1024TOMAXOCTETS_GB_HI) << 32); in axgbe_read_mmc_stats()
942 AXGMAC_IOREAD(pdata, MMC_RXUNICASTFRAMES_G_LO); in axgbe_read_mmc_stats()
944 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_RXUNICASTFRAMES_G_HI) << 32); in axgbe_read_mmc_stats()
947 AXGMAC_IOREAD(pdata, MMC_RXLENGTHERROR_LO); in axgbe_read_mmc_stats()
949 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_RXLENGTHERROR_HI) << 32); in axgbe_read_mmc_stats()
952 AXGMAC_IOREAD(pdata, MMC_RXOUTOFRANGETYPE_LO); in axgbe_read_mmc_stats()
954 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_RXOUTOFRANGETYPE_HI) << 32); in axgbe_read_mmc_stats()
957 AXGMAC_IOREAD(pdata, MMC_RXPAUSEFRAMES_LO); in axgbe_read_mmc_stats()
959 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_RXPAUSEFRAMES_HI) << 32); in axgbe_read_mmc_stats()
962 AXGMAC_IOREAD(pdata, MMC_RXFIFOOVERFLOW_LO); in axgbe_read_mmc_stats()
964 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_RXFIFOOVERFLOW_HI) << 32); in axgbe_read_mmc_stats()
967 AXGMAC_IOREAD(pdata, MMC_RXVLANFRAMES_GB_LO); in axgbe_read_mmc_stats()
969 ((uint64_t)AXGMAC_IOREAD(pdata, MMC_RXVLANFRAMES_GB_HI) << 32); in axgbe_read_mmc_stats()
972 AXGMAC_IOREAD(pdata, MMC_RXWATCHDOGERROR); in axgbe_read_mmc_stats()
975 AXGMAC_IOWRITE_BITS(pdata, MMC_CR, MCF, 0); in axgbe_read_mmc_stats()
982 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_dev_xstats_get() local
988 axgbe_read_mmc_stats(pdata); in axgbe_dev_xstats_get()
992 stats[i].value = *(u64 *)((uint8_t *)&pdata->mmc_stats + in axgbe_dev_xstats_get()
1025 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_dev_xstats_get_by_id() local
1030 axgbe_read_mmc_stats(pdata); in axgbe_dev_xstats_get_by_id()
1033 values[i] = *(u64 *)((uint8_t *)&pdata->mmc_stats + in axgbe_dev_xstats_get_by_id()
1079 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_dev_xstats_reset() local
1080 struct axgbe_mmc_stats *stats = &pdata->mmc_stats; in axgbe_dev_xstats_reset()
1083 axgbe_read_mmc_stats(pdata); in axgbe_dev_xstats_reset()
1097 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_dev_stats_get() local
1098 struct axgbe_mmc_stats *mmc_stats = &pdata->mmc_stats; in axgbe_dev_stats_get()
1101 axgbe_read_mmc_stats(pdata); in axgbe_dev_stats_get()
1155 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_dev_info_get() local
1157 dev_info->max_rx_queues = pdata->rx_ring_count; in axgbe_dev_info_get()
1158 dev_info->max_tx_queues = pdata->tx_ring_count; in axgbe_dev_info_get()
1161 dev_info->max_mac_addrs = pdata->hw_feat.addn_mac + 1; in axgbe_dev_info_get()
1162 dev_info->max_hash_mac_addrs = pdata->hw_feat.hash_table_size; in axgbe_dev_info_get()
1178 if (pdata->hw_feat.rss) { in axgbe_dev_info_get()
1180 dev_info->reta_size = pdata->hw_feat.hash_table_size; in axgbe_dev_info_get()
1201 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_flow_ctrl_get() local
1202 struct xgbe_fc_info fc = pdata->fc; in axgbe_flow_ctrl_get()
1206 reg_val = AXGMAC_IOREAD(pdata, reg); in axgbe_flow_ctrl_get()
1207 fc.low_water[0] = AXGMAC_MTL_IOREAD_BITS(pdata, 0, MTL_Q_RQFCR, RFA); in axgbe_flow_ctrl_get()
1208 fc.high_water[0] = AXGMAC_MTL_IOREAD_BITS(pdata, 0, MTL_Q_RQFCR, RFD); in axgbe_flow_ctrl_get()
1210 fc.autoneg = pdata->pause_autoneg; in axgbe_flow_ctrl_get()
1212 if (pdata->rx_pause && pdata->tx_pause) in axgbe_flow_ctrl_get()
1214 else if (pdata->rx_pause) in axgbe_flow_ctrl_get()
1216 else if (pdata->tx_pause) in axgbe_flow_ctrl_get()
1233 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_flow_ctrl_set() local
1234 struct xgbe_fc_info fc = pdata->fc; in axgbe_flow_ctrl_set()
1238 pdata->pause_autoneg = fc_conf->autoneg; in axgbe_flow_ctrl_set()
1239 pdata->phy.pause_autoneg = pdata->pause_autoneg; in axgbe_flow_ctrl_set()
1241 AXGMAC_MTL_IOWRITE_BITS(pdata, 0, MTL_Q_RQFCR, RFA, in axgbe_flow_ctrl_set()
1243 AXGMAC_MTL_IOWRITE_BITS(pdata, 0, MTL_Q_RQFCR, RFD, in axgbe_flow_ctrl_set()
1246 AXGMAC_IOWRITE(pdata, reg, reg_val); in axgbe_flow_ctrl_set()
1250 pdata->tx_pause = 1; in axgbe_flow_ctrl_set()
1251 pdata->rx_pause = 1; in axgbe_flow_ctrl_set()
1253 pdata->tx_pause = 0; in axgbe_flow_ctrl_set()
1254 pdata->rx_pause = 1; in axgbe_flow_ctrl_set()
1256 pdata->tx_pause = 1; in axgbe_flow_ctrl_set()
1257 pdata->rx_pause = 0; in axgbe_flow_ctrl_set()
1259 pdata->tx_pause = 0; in axgbe_flow_ctrl_set()
1260 pdata->rx_pause = 0; in axgbe_flow_ctrl_set()
1263 if (pdata->tx_pause != (unsigned int)pdata->phy.tx_pause) in axgbe_flow_ctrl_set()
1264 pdata->hw_if.config_tx_flow_control(pdata); in axgbe_flow_ctrl_set()
1266 if (pdata->rx_pause != (unsigned int)pdata->phy.rx_pause) in axgbe_flow_ctrl_set()
1267 pdata->hw_if.config_rx_flow_control(pdata); in axgbe_flow_ctrl_set()
1269 pdata->hw_if.config_flow_control(pdata); in axgbe_flow_ctrl_set()
1270 pdata->phy.tx_pause = pdata->tx_pause; in axgbe_flow_ctrl_set()
1271 pdata->phy.rx_pause = pdata->rx_pause; in axgbe_flow_ctrl_set()
1280 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_priority_flow_ctrl_set() local
1281 struct xgbe_fc_info fc = pdata->fc; in axgbe_priority_flow_ctrl_set()
1284 tc_num = pdata->pfc_map[pfc_conf->priority]; in axgbe_priority_flow_ctrl_set()
1286 if (pfc_conf->priority >= pdata->hw_feat.tc_cnt) { in axgbe_priority_flow_ctrl_set()
1288 pdata->hw_feat.tc_cnt); in axgbe_priority_flow_ctrl_set()
1292 pdata->pause_autoneg = pfc_conf->fc.autoneg; in axgbe_priority_flow_ctrl_set()
1293 pdata->phy.pause_autoneg = pdata->pause_autoneg; in axgbe_priority_flow_ctrl_set()
1295 AXGMAC_MTL_IOWRITE_BITS(pdata, tc_num, MTL_Q_RQFCR, RFA, in axgbe_priority_flow_ctrl_set()
1297 AXGMAC_MTL_IOWRITE_BITS(pdata, tc_num, MTL_Q_RQFCR, RFD, in axgbe_priority_flow_ctrl_set()
1302 AXGMAC_IOWRITE_BITS(pdata, MTL_TCPM0R, in axgbe_priority_flow_ctrl_set()
1306 AXGMAC_IOWRITE_BITS(pdata, MTL_TCPM0R, in axgbe_priority_flow_ctrl_set()
1310 AXGMAC_IOWRITE_BITS(pdata, MTL_TCPM0R, in axgbe_priority_flow_ctrl_set()
1314 AXGMAC_IOWRITE_BITS(pdata, MTL_TCPM0R, in axgbe_priority_flow_ctrl_set()
1318 AXGMAC_IOWRITE_BITS(pdata, MTL_TCPM1R, in axgbe_priority_flow_ctrl_set()
1322 AXGMAC_IOWRITE_BITS(pdata, MTL_TCPM1R, in axgbe_priority_flow_ctrl_set()
1326 AXGMAC_IOWRITE_BITS(pdata, MTL_TCPM1R, in axgbe_priority_flow_ctrl_set()
1330 AXGMAC_IOWRITE_BITS(pdata, MTL_TCPM1R, in axgbe_priority_flow_ctrl_set()
1338 pdata->tx_pause = 1; in axgbe_priority_flow_ctrl_set()
1339 pdata->rx_pause = 1; in axgbe_priority_flow_ctrl_set()
1340 AXGMAC_IOWRITE_BITS(pdata, MAC_RFCR, PFCE, 1); in axgbe_priority_flow_ctrl_set()
1342 pdata->tx_pause = 0; in axgbe_priority_flow_ctrl_set()
1343 pdata->rx_pause = 1; in axgbe_priority_flow_ctrl_set()
1344 AXGMAC_IOWRITE_BITS(pdata, MAC_RFCR, PFCE, 1); in axgbe_priority_flow_ctrl_set()
1346 pdata->tx_pause = 1; in axgbe_priority_flow_ctrl_set()
1347 pdata->rx_pause = 0; in axgbe_priority_flow_ctrl_set()
1348 AXGMAC_IOWRITE_BITS(pdata, MAC_RFCR, PFCE, 0); in axgbe_priority_flow_ctrl_set()
1350 pdata->tx_pause = 0; in axgbe_priority_flow_ctrl_set()
1351 pdata->rx_pause = 0; in axgbe_priority_flow_ctrl_set()
1352 AXGMAC_IOWRITE_BITS(pdata, MAC_RFCR, PFCE, 0); in axgbe_priority_flow_ctrl_set()
1355 if (pdata->tx_pause != (unsigned int)pdata->phy.tx_pause) in axgbe_priority_flow_ctrl_set()
1356 pdata->hw_if.config_tx_flow_control(pdata); in axgbe_priority_flow_ctrl_set()
1358 if (pdata->rx_pause != (unsigned int)pdata->phy.rx_pause) in axgbe_priority_flow_ctrl_set()
1359 pdata->hw_if.config_rx_flow_control(pdata); in axgbe_priority_flow_ctrl_set()
1360 pdata->hw_if.config_flow_control(pdata); in axgbe_priority_flow_ctrl_set()
1361 pdata->phy.tx_pause = pdata->tx_pause; in axgbe_priority_flow_ctrl_set()
1362 pdata->phy.rx_pause = pdata->rx_pause; in axgbe_priority_flow_ctrl_set()
1429 struct axgbe_port *pdata = dev->data->dev_private; in axgb_mtu_set() local
1451 AXGMAC_IOWRITE_BITS(pdata, MAC_RCR, JE, val); in axgb_mtu_set()
1457 axgbe_update_tstamp_time(struct axgbe_port *pdata, in axgbe_update_tstamp_time() argument
1471 AXGMAC_IOWRITE(pdata, MAC_STSUR, sub_val); in axgbe_update_tstamp_time()
1473 AXGMAC_IOWRITE(pdata, MAC_STNUR, sub_val); in axgbe_update_tstamp_time()
1474 AXGMAC_IOWRITE_BITS(pdata, MAC_STNUR, ADDSUB, 1); in axgbe_update_tstamp_time()
1476 AXGMAC_IOWRITE(pdata, MAC_STSUR, sec); in axgbe_update_tstamp_time()
1477 AXGMAC_IOWRITE_BITS(pdata, MAC_STNUR, ADDSUB, 0); in axgbe_update_tstamp_time()
1478 AXGMAC_IOWRITE(pdata, MAC_STNUR, nsec); in axgbe_update_tstamp_time()
1480 AXGMAC_IOWRITE_BITS(pdata, MAC_TSCR, TSUPDT, 1); in axgbe_update_tstamp_time()
1482 while (--count && AXGMAC_IOREAD_BITS(pdata, MAC_TSCR, TSUPDT)) in axgbe_update_tstamp_time()
1501 axgbe_adjfreq(struct axgbe_port *pdata, int64_t delta) in axgbe_adjfreq() argument
1511 adjust = (uint64_t)pdata->tstamp_addend; in axgbe_adjfreq()
1514 addend = (neg_adjust) ? pdata->tstamp_addend - diff : in axgbe_adjfreq()
1515 pdata->tstamp_addend + diff; in axgbe_adjfreq()
1516 pdata->tstamp_addend = addend; in axgbe_adjfreq()
1517 axgbe_update_tstamp_addend(pdata, addend); in axgbe_adjfreq()
1524 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_timesync_adjust_time() local
1527 axgbe_adjfreq(pdata, delta); in axgbe_timesync_adjust_time()
1528 pdata->systime_tc.nsec += delta; in axgbe_timesync_adjust_time()
1533 axgbe_update_tstamp_time(pdata, timestamp_delta.tv_sec, in axgbe_timesync_adjust_time()
1537 axgbe_update_tstamp_time(pdata, timestamp_delta.tv_sec, in axgbe_timesync_adjust_time()
1548 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_timesync_read_time() local
1550 nsec = AXGMAC_IOREAD(pdata, MAC_STSR); in axgbe_timesync_read_time()
1552 nsec += AXGMAC_IOREAD(pdata, MAC_STNR); in axgbe_timesync_read_time()
1561 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_timesync_write_time() local
1563 AXGMAC_IOWRITE(pdata, MAC_STSUR, timestamp->tv_sec); in axgbe_timesync_write_time()
1564 AXGMAC_IOWRITE(pdata, MAC_STNUR, timestamp->tv_nsec); in axgbe_timesync_write_time()
1565 AXGMAC_IOWRITE_BITS(pdata, MAC_TSCR, TSUPDT, 1); in axgbe_timesync_write_time()
1567 while (--count && AXGMAC_IOREAD_BITS(pdata, MAC_TSCR, TSUPDT)) in axgbe_timesync_write_time()
1575 axgbe_update_tstamp_addend(struct axgbe_port *pdata, in axgbe_update_tstamp_addend() argument
1580 AXGMAC_IOWRITE(pdata, MAC_TSAR, addend); in axgbe_update_tstamp_addend()
1581 AXGMAC_IOWRITE_BITS(pdata, MAC_TSCR, TSADDREG, 1); in axgbe_update_tstamp_addend()
1584 while (--count && AXGMAC_IOREAD_BITS(pdata, MAC_TSCR, TSADDREG)) in axgbe_update_tstamp_addend()
1591 axgbe_set_tstamp_time(struct axgbe_port *pdata, unsigned int sec, in axgbe_set_tstamp_time() argument
1597 AXGMAC_IOWRITE(pdata, MAC_STSUR, sec); in axgbe_set_tstamp_time()
1599 AXGMAC_IOWRITE(pdata, MAC_STNUR, nsec); in axgbe_set_tstamp_time()
1601 AXGMAC_IOWRITE_BITS(pdata, MAC_TSCR, TSINIT, 1); in axgbe_set_tstamp_time()
1604 while (--count && AXGMAC_IOREAD_BITS(pdata, MAC_TSCR, TSINIT)) in axgbe_set_tstamp_time()
1613 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_timesync_enable() local
1628 AXGMAC_IOWRITE(pdata, MAC_TSCR, mac_tscr); in axgbe_timesync_enable()
1638 AXGMAC_IOWRITE(pdata, MAC_TSCR, mac_tscr); in axgbe_timesync_enable()
1647 AXGMAC_IOWRITE_BITS(pdata, MAC_SSIR, SSINC, AXGBE_TSTAMP_SSINC); in axgbe_timesync_enable()
1649 AXGMAC_IOWRITE_BITS(pdata, MAC_SSIR, SNSINC, AXGBE_TSTAMP_SNSINC); in axgbe_timesync_enable()
1651 pdata->ptpclk_rate = AXGBE_V2_PTP_CLOCK_FREQ; in axgbe_timesync_enable()
1654 pdata->tstamp_addend = div_u64(dividend, pdata->ptpclk_rate); in axgbe_timesync_enable()
1656 axgbe_update_tstamp_addend(pdata, pdata->tstamp_addend); in axgbe_timesync_enable()
1657 axgbe_set_tstamp_time(pdata, 0, 0); in axgbe_timesync_enable()
1660 memset(&pdata->systime_tc, 0, sizeof(struct rte_timecounter)); in axgbe_timesync_enable()
1662 pdata->systime_tc.cc_mask = AXGBE_CYCLECOUNTER_MASK; in axgbe_timesync_enable()
1663 pdata->systime_tc.cc_shift = 0; in axgbe_timesync_enable()
1664 pdata->systime_tc.nsec_mask = 0; in axgbe_timesync_enable()
1671 nsec = rte_timecounter_update(&pdata->systime_tc, nsec); in axgbe_timesync_enable()
1672 axgbe_set_tstamp_time(pdata, timestamp.tv_sec, timestamp.tv_nsec); in axgbe_timesync_enable()
1679 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_timesync_disable() local
1685 AXGMAC_IOWRITE_BITS(pdata, MAC_TSCR, TSADDREG, 0); in axgbe_timesync_disable()
1734 struct axgbe_port *pdata = dev->data->dev_private; in axgbe_timesync_read_tx_timestamp() local
1738 if (pdata->vdata->tx_tstamp_workaround) { in axgbe_timesync_read_tx_timestamp()
1739 tx_snr = AXGMAC_IOREAD(pdata, MAC_TXSNR); in axgbe_timesync_read_tx_timestamp()
1740 tx_ssr = AXGMAC_IOREAD(pdata, MAC_TXSSR); in axgbe_timesync_read_tx_timestamp()
1743 tx_ssr = AXGMAC_IOREAD(pdata, MAC_TXSSR); in axgbe_timesync_read_tx_timestamp()
1744 tx_snr = AXGMAC_IOREAD(pdata, MAC_TXSNR); in axgbe_timesync_read_tx_timestamp()
1759 static void axgbe_get_all_hw_features(struct axgbe_port *pdata) in axgbe_get_all_hw_features() argument
1762 struct axgbe_hw_features *hw_feat = &pdata->hw_feat; in axgbe_get_all_hw_features()
1764 mac_hfr0 = AXGMAC_IOREAD(pdata, MAC_HWF0R); in axgbe_get_all_hw_features()
1765 mac_hfr1 = AXGMAC_IOREAD(pdata, MAC_HWF1R); in axgbe_get_all_hw_features()
1766 mac_hfr2 = AXGMAC_IOREAD(pdata, MAC_HWF2R); in axgbe_get_all_hw_features()
1770 hw_feat->version = AXGMAC_IOREAD(pdata, MAC_VR); in axgbe_get_all_hw_features()
1861 static void axgbe_init_all_fptrs(struct axgbe_port *pdata) in axgbe_init_all_fptrs() argument
1863 axgbe_init_function_ptrs_dev(&pdata->hw_if); in axgbe_init_all_fptrs()
1864 axgbe_init_function_ptrs_phy(&pdata->phy_if); in axgbe_init_all_fptrs()
1865 axgbe_init_function_ptrs_i2c(&pdata->i2c_if); in axgbe_init_all_fptrs()
1866 pdata->vdata->init_function_ptrs_phy_impl(&pdata->phy_if); in axgbe_init_all_fptrs()
1869 static void axgbe_set_counts(struct axgbe_port *pdata) in axgbe_set_counts() argument
1872 axgbe_init_all_fptrs(pdata); in axgbe_set_counts()
1875 axgbe_get_all_hw_features(pdata); in axgbe_set_counts()
1878 if (!pdata->tx_max_channel_count) in axgbe_set_counts()
1879 pdata->tx_max_channel_count = pdata->hw_feat.tx_ch_cnt; in axgbe_set_counts()
1880 if (!pdata->rx_max_channel_count) in axgbe_set_counts()
1881 pdata->rx_max_channel_count = pdata->hw_feat.rx_ch_cnt; in axgbe_set_counts()
1883 if (!pdata->tx_max_q_count) in axgbe_set_counts()
1884 pdata->tx_max_q_count = pdata->hw_feat.tx_q_cnt; in axgbe_set_counts()
1885 if (!pdata->rx_max_q_count) in axgbe_set_counts()
1886 pdata->rx_max_q_count = pdata->hw_feat.rx_q_cnt; in axgbe_set_counts()
1895 pdata->tx_ring_count = RTE_MIN(pdata->hw_feat.tx_ch_cnt, in axgbe_set_counts()
1896 pdata->tx_max_channel_count); in axgbe_set_counts()
1897 pdata->tx_ring_count = RTE_MIN(pdata->tx_ring_count, in axgbe_set_counts()
1898 pdata->tx_max_q_count); in axgbe_set_counts()
1900 pdata->tx_q_count = pdata->tx_ring_count; in axgbe_set_counts()
1902 pdata->rx_ring_count = RTE_MIN(pdata->hw_feat.rx_ch_cnt, in axgbe_set_counts()
1903 pdata->rx_max_channel_count); in axgbe_set_counts()
1905 pdata->rx_q_count = RTE_MIN(pdata->hw_feat.rx_q_cnt, in axgbe_set_counts()
1906 pdata->rx_max_q_count); in axgbe_set_counts()
1909 static void axgbe_default_config(struct axgbe_port *pdata) in axgbe_default_config() argument
1911 pdata->pblx8 = DMA_PBL_X8_ENABLE; in axgbe_default_config()
1912 pdata->tx_sf_mode = MTL_TSF_ENABLE; in axgbe_default_config()
1913 pdata->tx_threshold = MTL_TX_THRESHOLD_64; in axgbe_default_config()
1914 pdata->tx_pbl = DMA_PBL_32; in axgbe_default_config()
1915 pdata->tx_osp_mode = DMA_OSP_ENABLE; in axgbe_default_config()
1916 pdata->rx_sf_mode = MTL_RSF_ENABLE; in axgbe_default_config()
1917 pdata->rx_threshold = MTL_RX_THRESHOLD_64; in axgbe_default_config()
1918 pdata->rx_pbl = DMA_PBL_32; in axgbe_default_config()
1919 pdata->pause_autoneg = 1; in axgbe_default_config()
1920 pdata->tx_pause = 0; in axgbe_default_config()
1921 pdata->rx_pause = 0; in axgbe_default_config()
1922 pdata->phy_speed = SPEED_UNKNOWN; in axgbe_default_config()
1923 pdata->power_down = 0; in axgbe_default_config()
1957 struct axgbe_port *pdata; in eth_axgbe_dev_init() local
1977 pdata = eth_dev->data->dev_private; in eth_axgbe_dev_init()
1979 rte_bit_relaxed_set32(AXGBE_DOWN, &pdata->dev_state); in eth_axgbe_dev_init()
1980 rte_bit_relaxed_set32(AXGBE_STOPPED, &pdata->dev_state); in eth_axgbe_dev_init()
1981 pdata->eth_dev = eth_dev; in eth_axgbe_dev_init()
1984 pdata->pci_dev = pci_dev; in eth_axgbe_dev_init()
1990 pdata->xpcs_window_def_reg = PCS_V2_RV_WINDOW_DEF; in eth_axgbe_dev_init()
1991 pdata->xpcs_window_sel_reg = PCS_V2_RV_WINDOW_SELECT; in eth_axgbe_dev_init()
1993 pdata->xpcs_window_def_reg = PCS_V2_WINDOW_DEF; in eth_axgbe_dev_init()
1994 pdata->xpcs_window_sel_reg = PCS_V2_WINDOW_SELECT; in eth_axgbe_dev_init()
1997 pdata->xgmac_regs = in eth_axgbe_dev_init()
1999 pdata->xprop_regs = (void *)((uint8_t *)pdata->xgmac_regs in eth_axgbe_dev_init()
2001 pdata->xi2c_regs = (void *)((uint8_t *)pdata->xgmac_regs in eth_axgbe_dev_init()
2003 pdata->xpcs_regs = (void *)pci_dev->mem_resource[AXGBE_XPCS_BAR].addr; in eth_axgbe_dev_init()
2007 pdata->vdata = &axgbe_v2a; in eth_axgbe_dev_init()
2009 pdata->vdata = &axgbe_v2b; in eth_axgbe_dev_init()
2012 reg = XPCS32_IOREAD(pdata, pdata->xpcs_window_def_reg); in eth_axgbe_dev_init()
2013 pdata->xpcs_window = XPCS_GET_BITS(reg, PCS_V2_WINDOW_DEF, OFFSET); in eth_axgbe_dev_init()
2014 pdata->xpcs_window <<= 6; in eth_axgbe_dev_init()
2015 pdata->xpcs_window_size = XPCS_GET_BITS(reg, PCS_V2_WINDOW_DEF, SIZE); in eth_axgbe_dev_init()
2016 pdata->xpcs_window_size = 1 << (pdata->xpcs_window_size + 7); in eth_axgbe_dev_init()
2017 pdata->xpcs_window_mask = pdata->xpcs_window_size - 1; in eth_axgbe_dev_init()
2020 "xpcs window :%x, size :%x, mask :%x ", pdata->xpcs_window, in eth_axgbe_dev_init()
2021 pdata->xpcs_window_size, pdata->xpcs_window_mask); in eth_axgbe_dev_init()
2022 XP_IOWRITE(pdata, XP_INT_EN, 0x1fffff); in eth_axgbe_dev_init()
2025 mac_lo = XP_IOREAD(pdata, XP_MAC_ADDR_LO); in eth_axgbe_dev_init()
2026 mac_hi = XP_IOREAD(pdata, XP_MAC_ADDR_HI); in eth_axgbe_dev_init()
2027 pdata->mac_addr.addr_bytes[0] = mac_lo & 0xff; in eth_axgbe_dev_init()
2028 pdata->mac_addr.addr_bytes[1] = (mac_lo >> 8) & 0xff; in eth_axgbe_dev_init()
2029 pdata->mac_addr.addr_bytes[2] = (mac_lo >> 16) & 0xff; in eth_axgbe_dev_init()
2030 pdata->mac_addr.addr_bytes[3] = (mac_lo >> 24) & 0xff; in eth_axgbe_dev_init()
2031 pdata->mac_addr.addr_bytes[4] = mac_hi & 0xff; in eth_axgbe_dev_init()
2032 pdata->mac_addr.addr_bytes[5] = (mac_hi >> 8) & 0xff; in eth_axgbe_dev_init()
2056 if (!rte_is_valid_assigned_ether_addr(&pdata->mac_addr)) in eth_axgbe_dev_init()
2057 rte_eth_random_addr(pdata->mac_addr.addr_bytes); in eth_axgbe_dev_init()
2060 rte_ether_addr_copy(&pdata->mac_addr, ð_dev->data->mac_addrs[0]); in eth_axgbe_dev_init()
2063 pdata->sysclk_rate = AXGBE_V2_DMA_CLOCK_FREQ; in eth_axgbe_dev_init()
2064 pdata->ptpclk_rate = AXGBE_V2_PTP_CLOCK_FREQ; in eth_axgbe_dev_init()
2067 pdata->coherent = 1; in eth_axgbe_dev_init()
2068 pdata->axdomain = AXGBE_DMA_OS_AXDOMAIN; in eth_axgbe_dev_init()
2069 pdata->arcache = AXGBE_DMA_OS_ARCACHE; in eth_axgbe_dev_init()
2070 pdata->awcache = AXGBE_DMA_OS_AWCACHE; in eth_axgbe_dev_init()
2073 reg = XP_IOREAD(pdata, XP_PROP_1); in eth_axgbe_dev_init()
2074 pdata->tx_max_channel_count = XP_GET_BITS(reg, XP_PROP_1, MAX_TX_DMA); in eth_axgbe_dev_init()
2075 pdata->rx_max_channel_count = XP_GET_BITS(reg, XP_PROP_1, MAX_RX_DMA); in eth_axgbe_dev_init()
2076 pdata->tx_max_q_count = XP_GET_BITS(reg, XP_PROP_1, MAX_TX_QUEUES); in eth_axgbe_dev_init()
2077 pdata->rx_max_q_count = XP_GET_BITS(reg, XP_PROP_1, MAX_RX_QUEUES); in eth_axgbe_dev_init()
2080 axgbe_set_counts(pdata); in eth_axgbe_dev_init()
2083 reg = XP_IOREAD(pdata, XP_PROP_2); in eth_axgbe_dev_init()
2084 pdata->tx_max_fifo_size = XP_GET_BITS(reg, XP_PROP_2, TX_FIFO_SIZE); in eth_axgbe_dev_init()
2085 pdata->tx_max_fifo_size *= 16384; in eth_axgbe_dev_init()
2086 pdata->tx_max_fifo_size = RTE_MIN(pdata->tx_max_fifo_size, in eth_axgbe_dev_init()
2087 pdata->vdata->tx_max_fifo_size); in eth_axgbe_dev_init()
2088 pdata->rx_max_fifo_size = XP_GET_BITS(reg, XP_PROP_2, RX_FIFO_SIZE); in eth_axgbe_dev_init()
2089 pdata->rx_max_fifo_size *= 16384; in eth_axgbe_dev_init()
2090 pdata->rx_max_fifo_size = RTE_MIN(pdata->rx_max_fifo_size, in eth_axgbe_dev_init()
2091 pdata->vdata->rx_max_fifo_size); in eth_axgbe_dev_init()
2093 ret = pdata->hw_if.exit(pdata); in eth_axgbe_dev_init()
2098 axgbe_default_config(pdata); in eth_axgbe_dev_init()
2101 if (!pdata->tx_max_fifo_size) in eth_axgbe_dev_init()
2102 pdata->tx_max_fifo_size = pdata->hw_feat.tx_fifo_size; in eth_axgbe_dev_init()
2103 if (!pdata->rx_max_fifo_size) in eth_axgbe_dev_init()
2104 pdata->rx_max_fifo_size = pdata->hw_feat.rx_fifo_size; in eth_axgbe_dev_init()
2106 pdata->tx_desc_count = AXGBE_MAX_RING_DESC; in eth_axgbe_dev_init()
2107 pdata->rx_desc_count = AXGBE_MAX_RING_DESC; in eth_axgbe_dev_init()
2108 pthread_mutex_init(&pdata->xpcs_mutex, NULL); in eth_axgbe_dev_init()
2109 pthread_mutex_init(&pdata->i2c_mutex, NULL); in eth_axgbe_dev_init()
2110 pthread_mutex_init(&pdata->an_mutex, NULL); in eth_axgbe_dev_init()
2111 pthread_mutex_init(&pdata->phy_mutex, NULL); in eth_axgbe_dev_init()
2113 ret = pdata->phy_if.phy_init(pdata); in eth_axgbe_dev_init()