Lines Matching refs:dev
57 pf_af_sync_msg(struct otx2_dev *dev, struct mbox_msghdr **rsp) in pf_af_sync_msg() argument
59 uint32_t timeout = 0, sleep = 1; struct otx2_mbox *mbox = dev->mbox; in pf_af_sync_msg()
60 struct otx2_mbox_dev *mdev = &mbox->dev[0]; in pf_af_sync_msg()
67 otx2_write64(~0ull, dev->bar2 + RVU_PF_INT_ENA_W1C); in pf_af_sync_msg()
80 int_status = otx2_read64(dev->bar2 + RVU_PF_INT); in pf_af_sync_msg()
84 otx2_write64(int_status, dev->bar2 + RVU_PF_INT); in pf_af_sync_msg()
87 otx2_write64(~0ull, dev->bar2 + RVU_PF_INT_ENA_W1S); in pf_af_sync_msg()
103 af_pf_wait_msg(struct otx2_dev *dev, uint16_t vf, int num_msg) in af_pf_wait_msg() argument
105 uint32_t timeout = 0, sleep = 1; struct otx2_mbox *mbox = dev->mbox; in af_pf_wait_msg()
106 struct otx2_mbox_dev *mdev = &mbox->dev[0]; in af_pf_wait_msg()
116 otx2_write64(~0ull, dev->bar2 + RVU_PF_INT_ENA_W1C); in af_pf_wait_msg()
129 int_status = otx2_read64(dev->bar2 + RVU_PF_INT); in af_pf_wait_msg()
133 otx2_write64(~0ull, dev->bar2 + RVU_PF_INT); in af_pf_wait_msg()
136 otx2_write64(~0ull, dev->bar2 + RVU_PF_INT_ENA_W1S); in af_pf_wait_msg()
154 rsp = otx2_mbox_alloc_msg(&dev->mbox_vfpf, vf, size); in af_pf_wait_msg()
174 vf_pf_process_msgs(struct otx2_dev *dev, uint16_t vf) in vf_pf_process_msgs() argument
176 int offset, routed = 0; struct otx2_mbox *mbox = &dev->mbox_vfpf; in vf_pf_process_msgs()
177 struct otx2_mbox_dev *mdev = &mbox->dev[vf]; in vf_pf_process_msgs()
195 msg->pcifunc = otx2_pfvf_func(dev->pf, vf); in vf_pf_process_msgs()
199 uint16_t max_bits = sizeof(dev->active_vfs[0]) * 8; in vf_pf_process_msgs()
202 dev->active_vfs[vf / max_bits] |= in vf_pf_process_msgs()
215 af_req = otx2_mbox_alloc_msg(dev->mbox, 0, size); in vf_pf_process_msgs()
231 dev->pf, routed, vf); in vf_pf_process_msgs()
232 af_pf_wait_msg(dev, vf, routed); in vf_pf_process_msgs()
233 otx2_mbox_reset(dev->mbox, 0); in vf_pf_process_msgs()
239 dev->pf, mdev->num_msgs, vf); in vf_pf_process_msgs()
247 vf_pf_process_up_msgs(struct otx2_dev *dev, uint16_t vf) in vf_pf_process_up_msgs() argument
249 struct otx2_mbox *mbox = &dev->mbox_vfpf_up; in vf_pf_process_up_msgs()
250 struct otx2_mbox_dev *mdev = &mbox->dev[vf]; in vf_pf_process_up_msgs()
268 msg->pcifunc = otx2_pfvf_func(dev->pf, vf); in vf_pf_process_up_msgs()
301 struct otx2_dev *dev = param; in otx2_vf_pf_mbox_handle_msg() local
303 max_bits = sizeof(dev->intr.bits[0]) * sizeof(uint64_t); in otx2_vf_pf_mbox_handle_msg()
307 if (dev->intr.bits[vf/max_bits] & BIT_ULL(vf%max_bits)) { in otx2_vf_pf_mbox_handle_msg()
309 vf, dev->pf, dev->vf); in otx2_vf_pf_mbox_handle_msg()
310 vf_pf_process_msgs(dev, vf); in otx2_vf_pf_mbox_handle_msg()
312 vf_pf_process_up_msgs(dev, vf); in otx2_vf_pf_mbox_handle_msg()
313 dev->intr.bits[vf/max_bits] &= ~(BIT_ULL(vf%max_bits)); in otx2_vf_pf_mbox_handle_msg()
316 dev->timer_set = 0; in otx2_vf_pf_mbox_handle_msg()
322 struct otx2_dev *dev = param; in otx2_vf_pf_mbox_irq() local
328 intr = otx2_read64(dev->bar2 + RVU_PF_VFPF_MBOX_INTX(vfpf)); in otx2_vf_pf_mbox_irq()
333 vfpf, intr, dev->pf, dev->vf); in otx2_vf_pf_mbox_irq()
336 dev->intr.bits[vfpf] |= intr; in otx2_vf_pf_mbox_irq()
337 otx2_write64(intr, dev->bar2 + RVU_PF_VFPF_MBOX_INTX(vfpf)); in otx2_vf_pf_mbox_irq()
341 if (!dev->timer_set && alarm_set) { in otx2_vf_pf_mbox_irq()
342 dev->timer_set = 1; in otx2_vf_pf_mbox_irq()
345 otx2_vf_pf_mbox_handle_msg, dev); in otx2_vf_pf_mbox_irq()
350 otx2_process_msgs(struct otx2_dev *dev, struct otx2_mbox *mbox) in otx2_process_msgs() argument
352 struct otx2_mbox_dev *mdev = &mbox->dev[0]; in otx2_process_msgs()
377 dev->pf_func = msg->pcifunc; in otx2_process_msgs()
397 pf_vf_mbox_send_up_msg(struct otx2_dev *dev, void *rec_msg) in pf_vf_mbox_send_up_msg() argument
399 uint16_t max_bits = sizeof(dev->active_vfs[0]) * sizeof(uint64_t); in pf_vf_mbox_send_up_msg()
400 struct otx2_mbox *vf_mbox = &dev->mbox_vfpf_up; in pf_vf_mbox_send_up_msg()
410 if (!(dev->active_vfs[vf / max_bits] & (BIT_ULL(vf)))) in pf_vf_mbox_send_up_msg()
435 vf_msg->pcifunc = dev->pf_func; in pf_vf_mbox_send_up_msg()
443 otx2_mbox_up_handler_cgx_link_event(struct otx2_dev *dev, in otx2_mbox_up_handler_cgx_link_event() argument
450 otx2_get_pf(dev->pf_func), otx2_get_vf(dev->pf_func), in otx2_mbox_up_handler_cgx_link_event()
458 if (dev->ops && dev->ops->link_status_update) in otx2_mbox_up_handler_cgx_link_event()
459 dev->ops->link_status_update(dev, linfo); in otx2_mbox_up_handler_cgx_link_event()
462 pf_vf_mbox_send_up_msg(dev, msg); in otx2_mbox_up_handler_cgx_link_event()
465 if (dev->ops && dev->ops->link_status_update) in otx2_mbox_up_handler_cgx_link_event()
466 dev->ops->link_status_update(dev, linfo); in otx2_mbox_up_handler_cgx_link_event()
474 otx2_mbox_up_handler_cgx_ptp_rx_info(struct otx2_dev *dev, in otx2_mbox_up_handler_cgx_ptp_rx_info() argument
479 otx2_get_pf(dev->pf_func), in otx2_mbox_up_handler_cgx_ptp_rx_info()
480 otx2_get_vf(dev->pf_func), in otx2_mbox_up_handler_cgx_ptp_rx_info()
488 if (dev->ops && dev->ops->ptp_info_update) in otx2_mbox_up_handler_cgx_ptp_rx_info()
489 dev->ops->ptp_info_update(dev, msg->ptp_en); in otx2_mbox_up_handler_cgx_ptp_rx_info()
492 pf_vf_mbox_send_up_msg(dev, msg); in otx2_mbox_up_handler_cgx_ptp_rx_info()
495 if (dev->ops && dev->ops->ptp_info_update) in otx2_mbox_up_handler_cgx_ptp_rx_info()
496 dev->ops->ptp_info_update(dev, msg->ptp_en); in otx2_mbox_up_handler_cgx_ptp_rx_info()
504 mbox_process_msgs_up(struct otx2_dev *dev, struct mbox_msghdr *req) in mbox_process_msgs_up() argument
517 &dev->mbox_up, 0, \ in mbox_process_msgs_up()
524 rsp->hdr.pcifunc = dev->pf_func; \ in mbox_process_msgs_up()
528 dev, (struct _req_type *)req, rsp); \ in mbox_process_msgs_up()
535 otx2_reply_invalid_msg(&dev->mbox_up, 0, 0, req->id); in mbox_process_msgs_up()
542 otx2_process_msgs_up(struct otx2_dev *dev, struct otx2_mbox *mbox) in otx2_process_msgs_up() argument
544 struct otx2_mbox_dev *mdev = &mbox->dev[0]; in otx2_process_msgs_up()
561 err = mbox_process_msgs_up(dev, msg); in otx2_process_msgs_up()
577 struct otx2_dev *dev = param; in otx2_pf_vf_mbox_irq() local
580 intr = otx2_read64(dev->bar2 + RVU_VF_INT); in otx2_pf_vf_mbox_irq()
584 otx2_write64(intr, dev->bar2 + RVU_VF_INT); in otx2_pf_vf_mbox_irq()
585 otx2_base_dbg("Irq 0x%" PRIx64 "(pf:%d,vf:%d)", intr, dev->pf, dev->vf); in otx2_pf_vf_mbox_irq()
588 otx2_process_msgs(dev, dev->mbox); in otx2_pf_vf_mbox_irq()
591 otx2_process_msgs_up(dev, &dev->mbox_up); in otx2_pf_vf_mbox_irq()
597 struct otx2_dev *dev = param; in otx2_af_pf_mbox_irq() local
600 intr = otx2_read64(dev->bar2 + RVU_PF_INT); in otx2_af_pf_mbox_irq()
604 otx2_write64(intr, dev->bar2 + RVU_PF_INT); in otx2_af_pf_mbox_irq()
605 otx2_base_dbg("Irq 0x%" PRIx64 "(pf:%d,vf:%d)", intr, dev->pf, dev->vf); in otx2_af_pf_mbox_irq()
608 otx2_process_msgs(dev, dev->mbox); in otx2_af_pf_mbox_irq()
611 otx2_process_msgs_up(dev, &dev->mbox_up); in otx2_af_pf_mbox_irq()
615 mbox_register_pf_irq(struct rte_pci_device *pci_dev, struct otx2_dev *dev) in mbox_register_pf_irq() argument
622 otx2_write64(~0ull, dev->bar2 + in mbox_register_pf_irq()
625 otx2_write64(~0ull, dev->bar2 + RVU_PF_INT_ENA_W1C); in mbox_register_pf_irq()
627 dev->timer_set = 0; in mbox_register_pf_irq()
630 rc = otx2_register_irq(intr_handle, otx2_vf_pf_mbox_irq, dev, in mbox_register_pf_irq()
638 rc = otx2_register_irq(intr_handle, otx2_vf_pf_mbox_irq, dev, in mbox_register_pf_irq()
647 dev, RVU_PF_INT_VEC_AFPF_MBOX); in mbox_register_pf_irq()
655 otx2_write64(~0ull, dev->bar2 + in mbox_register_pf_irq()
658 otx2_write64(~0ull, dev->bar2 + RVU_PF_INT); in mbox_register_pf_irq()
659 otx2_write64(~0ull, dev->bar2 + RVU_PF_INT_ENA_W1S); in mbox_register_pf_irq()
665 mbox_register_vf_irq(struct rte_pci_device *pci_dev, struct otx2_dev *dev) in mbox_register_vf_irq() argument
671 otx2_write64(~0ull, dev->bar2 + RVU_VF_INT_ENA_W1C); in mbox_register_vf_irq()
675 dev, RVU_VF_INT_VEC_MBOX); in mbox_register_vf_irq()
682 otx2_write64(~0ull, dev->bar2 + RVU_VF_INT); in mbox_register_vf_irq()
683 otx2_write64(~0ull, dev->bar2 + RVU_VF_INT_ENA_W1S); in mbox_register_vf_irq()
689 mbox_register_irq(struct rte_pci_device *pci_dev, struct otx2_dev *dev) in mbox_register_irq() argument
691 if (otx2_dev_is_vf(dev)) in mbox_register_irq()
692 return mbox_register_vf_irq(pci_dev, dev); in mbox_register_irq()
694 return mbox_register_pf_irq(pci_dev, dev); in mbox_register_irq()
698 mbox_unregister_pf_irq(struct rte_pci_device *pci_dev, struct otx2_dev *dev) in mbox_unregister_pf_irq() argument
705 otx2_write64(~0ull, dev->bar2 + in mbox_unregister_pf_irq()
708 otx2_write64(~0ull, dev->bar2 + RVU_PF_INT_ENA_W1C); in mbox_unregister_pf_irq()
710 dev->timer_set = 0; in mbox_unregister_pf_irq()
712 rte_eal_alarm_cancel(otx2_vf_pf_mbox_handle_msg, dev); in mbox_unregister_pf_irq()
716 otx2_unregister_irq(intr_handle, otx2_vf_pf_mbox_irq, dev, in mbox_unregister_pf_irq()
720 otx2_unregister_irq(intr_handle, otx2_vf_pf_mbox_irq, dev, in mbox_unregister_pf_irq()
724 otx2_unregister_irq(intr_handle, otx2_af_pf_mbox_irq, dev, in mbox_unregister_pf_irq()
730 mbox_unregister_vf_irq(struct rte_pci_device *pci_dev, struct otx2_dev *dev) in mbox_unregister_vf_irq() argument
735 otx2_write64(~0ull, dev->bar2 + RVU_VF_INT_ENA_W1C); in mbox_unregister_vf_irq()
738 otx2_unregister_irq(intr_handle, otx2_pf_vf_mbox_irq, dev, in mbox_unregister_vf_irq()
743 mbox_unregister_irq(struct rte_pci_device *pci_dev, struct otx2_dev *dev) in mbox_unregister_irq() argument
745 if (otx2_dev_is_vf(dev)) in mbox_unregister_irq()
746 mbox_unregister_vf_irq(pci_dev, dev); in mbox_unregister_irq()
748 mbox_unregister_pf_irq(pci_dev, dev); in mbox_unregister_irq()
752 vf_flr_send_msg(struct otx2_dev *dev, uint16_t vf) in vf_flr_send_msg() argument
754 struct otx2_mbox *mbox = dev->mbox; in vf_flr_send_msg()
760 req->hdr.pcifunc = otx2_pfvf_func(dev->pf, vf); in vf_flr_send_msg()
763 rc = pf_af_sync_msg(dev, NULL); in vf_flr_send_msg()
773 struct otx2_dev *dev = (struct otx2_dev *)param; in otx2_pf_vf_flr_irq() local
779 max_vf = (dev->maxvf > 0) ? dev->maxvf : 64; in otx2_pf_vf_flr_irq()
780 bar2 = dev->bar2; in otx2_pf_vf_flr_irq()
801 vf_flr_send_msg(dev, vf); in otx2_pf_vf_flr_irq()
813 vf_flr_unregister_irqs(struct rte_pci_device *pci_dev, struct otx2_dev *dev) in vf_flr_unregister_irqs() argument
822 otx2_write64(~0ull, dev->bar2 + RVU_PF_VFFLR_INT_ENA_W1CX(i)); in vf_flr_unregister_irqs()
824 otx2_unregister_irq(intr_handle, otx2_pf_vf_flr_irq, dev, in vf_flr_unregister_irqs()
827 otx2_unregister_irq(intr_handle, otx2_pf_vf_flr_irq, dev, in vf_flr_unregister_irqs()
834 vf_flr_register_irqs(struct rte_pci_device *pci_dev, struct otx2_dev *dev) in vf_flr_register_irqs() argument
841 rc = otx2_register_irq(handle, otx2_pf_vf_flr_irq, dev, in vf_flr_register_irqs()
846 rc = otx2_register_irq(handle, otx2_pf_vf_flr_irq, dev, in vf_flr_register_irqs()
853 otx2_write64(~0ull, dev->bar2 + RVU_PF_VFFLR_INTX(i)); in vf_flr_register_irqs()
854 otx2_write64(~0ull, dev->bar2 + RVU_PF_VFTRPENDX(i)); in vf_flr_register_irqs()
855 otx2_write64(~0ull, dev->bar2 + RVU_PF_VFFLR_INT_ENA_W1SX(i)); in vf_flr_register_irqs()
867 struct otx2_dev *dev = otx2_dev; in otx2_dev_active_vfs() local
871 count += __builtin_popcount(dev->active_vfs[i]); in otx2_dev_active_vfs()
877 otx2_update_vf_hwcap(struct rte_pci_device *pci_dev, struct otx2_dev *dev) in otx2_update_vf_hwcap() argument
888 dev->hwcap |= OTX2_HWCAP_F_VF; in otx2_update_vf_hwcap()
903 struct otx2_dev *dev = otx2_dev; in otx2_dev_priv_init() local
917 dev->node = pci_dev->device.numa_node; in otx2_dev_priv_init()
918 dev->maxvf = pci_dev->max_vfs; in otx2_dev_priv_init()
919 dev->bar2 = bar2; in otx2_dev_priv_init()
920 dev->bar4 = bar4; in otx2_dev_priv_init()
922 otx2_update_vf_hwcap(pci_dev, dev); in otx2_dev_priv_init()
924 if (otx2_dev_is_vf(dev)) { in otx2_dev_priv_init()
931 rc = otx2_mbox_init(&dev->mbox_local, bar4, bar2, direction, 1, in otx2_dev_priv_init()
935 dev->mbox = &dev->mbox_local; in otx2_dev_priv_init()
937 rc = otx2_mbox_init(&dev->mbox_up, bar4, bar2, up_direction, 1, in otx2_dev_priv_init()
943 rc = mbox_register_irq(pci_dev, dev); in otx2_dev_priv_init()
948 rc = otx2_send_ready_msg(dev->mbox, &dev->pf_func); in otx2_dev_priv_init()
952 dev->pf = otx2_get_pf(dev->pf_func); in otx2_dev_priv_init()
953 dev->vf = otx2_get_vf(dev->pf_func); in otx2_dev_priv_init()
954 memset(&dev->active_vfs, 0, sizeof(dev->active_vfs)); in otx2_dev_priv_init()
972 rc = otx2_mbox_init(&dev->mbox_vfpf, (uintptr_t)hwbase, in otx2_dev_priv_init()
979 rc = otx2_mbox_init(&dev->mbox_vfpf_up, (uintptr_t)hwbase, in otx2_dev_priv_init()
987 if (otx2_dev_is_pf(dev)) { in otx2_dev_priv_init()
988 rc = vf_flr_register_irqs(pci_dev, dev); in otx2_dev_priv_init()
992 dev->mbox_active = 1; in otx2_dev_priv_init()
998 mbox_unregister_irq(pci_dev, dev); in otx2_dev_priv_init()
1000 otx2_mbox_fini(dev->mbox); in otx2_dev_priv_init()
1001 otx2_mbox_fini(&dev->mbox_up); in otx2_dev_priv_init()
1014 struct otx2_dev *dev = otx2_dev; in otx2_dev_fini() local
1023 mbox_unregister_irq(pci_dev, dev); in otx2_dev_fini()
1025 if (otx2_dev_is_pf(dev)) in otx2_dev_fini()
1026 vf_flr_unregister_irqs(pci_dev, dev); in otx2_dev_fini()
1028 mbox = &dev->mbox_vfpf; in otx2_dev_fini()
1029 if (mbox->hwbase && mbox->dev) in otx2_dev_fini()
1033 mbox = &dev->mbox_vfpf_up; in otx2_dev_fini()
1037 mbox = dev->mbox; in otx2_dev_fini()
1039 mbox = &dev->mbox_up; in otx2_dev_fini()
1041 dev->mbox_active = 0; in otx2_dev_fini()