Lines Matching refs:attr
207 struct mlx5_devx_mkey_attr *attr) in mlx5_devx_cmd_mkey_create() argument
209 struct mlx5_klm *klm_array = attr->klm_array; in mlx5_devx_cmd_mkey_create()
210 int klm_num = attr->klm_num; in mlx5_devx_cmd_mkey_create()
251 MLX5_SET(mkc, mkc, access_mode_1_0, attr->log_entity_size ? in mlx5_devx_cmd_mkey_create()
254 MLX5_SET(mkc, mkc, log_page_size, attr->log_entity_size); in mlx5_devx_cmd_mkey_create()
256 translation_size = (RTE_ALIGN(attr->size, pgsize) * 8) / 16; in mlx5_devx_cmd_mkey_create()
262 MLX5_SET(create_mkey_in, in, mkey_umem_id, attr->umem_id); in mlx5_devx_cmd_mkey_create()
263 MLX5_SET(create_mkey_in, in, pg_access, attr->pg_access); in mlx5_devx_cmd_mkey_create()
267 MLX5_SET(mkc, mkc, pd, attr->pd); in mlx5_devx_cmd_mkey_create()
268 MLX5_SET(mkc, mkc, mkey_7_0, attr->umem_id & 0xFF); in mlx5_devx_cmd_mkey_create()
271 attr->relaxed_ordering_write); in mlx5_devx_cmd_mkey_create()
273 attr->relaxed_ordering_read); in mlx5_devx_cmd_mkey_create()
274 MLX5_SET64(mkc, mkc, start_addr, attr->addr); in mlx5_devx_cmd_mkey_create()
275 MLX5_SET64(mkc, mkc, len, attr->size); in mlx5_devx_cmd_mkey_create()
286 mkey->id = (mkey->id << 8) | (attr->umem_id & 0xFF); in mlx5_devx_cmd_mkey_create()
355 struct mlx5_hca_attr *attr) in mlx5_devx_cmd_query_nic_vport_context() argument
383 attr->vport_inline_mode = MLX5_GET(nic_vport_context, vctx, in mlx5_devx_cmd_query_nic_vport_context()
645 struct mlx5_hca_attr *attr) in mlx5_devx_cmd_query_hca_attr() argument
670 attr->flow_counter_bulk_alloc_bitmap = in mlx5_devx_cmd_query_hca_attr()
672 attr->flow_counters_dump = MLX5_GET(cmd_hca_cap, hcattr, in mlx5_devx_cmd_query_hca_attr()
674 attr->log_max_rqt_size = MLX5_GET(cmd_hca_cap, hcattr, in mlx5_devx_cmd_query_hca_attr()
676 attr->eswitch_manager = MLX5_GET(cmd_hca_cap, hcattr, eswitch_manager); in mlx5_devx_cmd_query_hca_attr()
677 attr->hairpin = MLX5_GET(cmd_hca_cap, hcattr, hairpin); in mlx5_devx_cmd_query_hca_attr()
678 attr->log_max_hairpin_queues = MLX5_GET(cmd_hca_cap, hcattr, in mlx5_devx_cmd_query_hca_attr()
680 attr->log_max_hairpin_wq_data_sz = MLX5_GET(cmd_hca_cap, hcattr, in mlx5_devx_cmd_query_hca_attr()
682 attr->log_max_hairpin_num_packets = MLX5_GET in mlx5_devx_cmd_query_hca_attr()
684 attr->vhca_id = MLX5_GET(cmd_hca_cap, hcattr, vhca_id); in mlx5_devx_cmd_query_hca_attr()
685 attr->relaxed_ordering_write = MLX5_GET(cmd_hca_cap, hcattr, in mlx5_devx_cmd_query_hca_attr()
687 attr->relaxed_ordering_read = MLX5_GET(cmd_hca_cap, hcattr, in mlx5_devx_cmd_query_hca_attr()
689 attr->access_register_user = MLX5_GET(cmd_hca_cap, hcattr, in mlx5_devx_cmd_query_hca_attr()
691 attr->eth_net_offloads = MLX5_GET(cmd_hca_cap, hcattr, in mlx5_devx_cmd_query_hca_attr()
693 attr->eth_virt = MLX5_GET(cmd_hca_cap, hcattr, eth_virt); in mlx5_devx_cmd_query_hca_attr()
694 attr->flex_parser_protocols = MLX5_GET(cmd_hca_cap, hcattr, in mlx5_devx_cmd_query_hca_attr()
696 attr->qos.sup = MLX5_GET(cmd_hca_cap, hcattr, qos); in mlx5_devx_cmd_query_hca_attr()
697 attr->vdpa.valid = !!(MLX5_GET64(cmd_hca_cap, hcattr, in mlx5_devx_cmd_query_hca_attr()
700 attr->vdpa.queue_counters_valid = !!(MLX5_GET64(cmd_hca_cap, hcattr, in mlx5_devx_cmd_query_hca_attr()
703 attr->parse_graph_flex_node = !!(MLX5_GET64(cmd_hca_cap, hcattr, in mlx5_devx_cmd_query_hca_attr()
706 attr->wqe_index_ignore = MLX5_GET(cmd_hca_cap, hcattr, in mlx5_devx_cmd_query_hca_attr()
708 attr->cross_channel = MLX5_GET(cmd_hca_cap, hcattr, cd); in mlx5_devx_cmd_query_hca_attr()
709 attr->non_wire_sq = MLX5_GET(cmd_hca_cap, hcattr, non_wire_sq); in mlx5_devx_cmd_query_hca_attr()
710 attr->log_max_static_sq_wq = MLX5_GET(cmd_hca_cap, hcattr, in mlx5_devx_cmd_query_hca_attr()
712 attr->num_lag_ports = MLX5_GET(cmd_hca_cap, hcattr, num_lag_ports); in mlx5_devx_cmd_query_hca_attr()
713 attr->dev_freq_khz = MLX5_GET(cmd_hca_cap, hcattr, in mlx5_devx_cmd_query_hca_attr()
715 attr->scatter_fcs_w_decap_disable = in mlx5_devx_cmd_query_hca_attr()
717 attr->regex = MLX5_GET(cmd_hca_cap, hcattr, regexp); in mlx5_devx_cmd_query_hca_attr()
718 attr->regexp_num_of_engines = MLX5_GET(cmd_hca_cap, hcattr, in mlx5_devx_cmd_query_hca_attr()
720 attr->flow_hit_aso = !!(MLX5_GET64(cmd_hca_cap, hcattr, in mlx5_devx_cmd_query_hca_attr()
723 if (attr->qos.sup) { in mlx5_devx_cmd_query_hca_attr()
738 attr->qos.srtcm_sup = in mlx5_devx_cmd_query_hca_attr()
740 attr->qos.log_max_flow_meter = in mlx5_devx_cmd_query_hca_attr()
742 attr->qos.flow_meter_reg_c_ids = in mlx5_devx_cmd_query_hca_attr()
744 attr->qos.flow_meter_reg_share = in mlx5_devx_cmd_query_hca_attr()
746 attr->qos.packet_pacing = in mlx5_devx_cmd_query_hca_attr()
748 attr->qos.wqe_rate_pp = in mlx5_devx_cmd_query_hca_attr()
751 if (attr->vdpa.valid) in mlx5_devx_cmd_query_hca_attr()
752 mlx5_devx_cmd_query_hca_vdpa_attr(ctx, &attr->vdpa); in mlx5_devx_cmd_query_hca_attr()
753 if (!attr->eth_net_offloads) in mlx5_devx_cmd_query_hca_attr()
775 attr->log_max_ft_sampler_num = 0; in mlx5_devx_cmd_query_hca_attr()
779 attr->log_max_ft_sampler_num = in mlx5_devx_cmd_query_hca_attr()
795 attr->eth_net_offloads = 0; in mlx5_devx_cmd_query_hca_attr()
804 attr->eth_net_offloads = 0; in mlx5_devx_cmd_query_hca_attr()
808 attr->wqe_vlan_insert = MLX5_GET(per_protocol_networking_offload_caps, in mlx5_devx_cmd_query_hca_attr()
810 attr->lro_cap = MLX5_GET(per_protocol_networking_offload_caps, hcattr, in mlx5_devx_cmd_query_hca_attr()
812 attr->tunnel_lro_gre = MLX5_GET(per_protocol_networking_offload_caps, in mlx5_devx_cmd_query_hca_attr()
814 attr->tunnel_lro_vxlan = MLX5_GET(per_protocol_networking_offload_caps, in mlx5_devx_cmd_query_hca_attr()
816 attr->lro_max_msg_sz_mode = MLX5_GET in mlx5_devx_cmd_query_hca_attr()
820 attr->lro_timer_supported_periods[i] = in mlx5_devx_cmd_query_hca_attr()
824 attr->lro_min_mss_size = MLX5_GET(per_protocol_networking_offload_caps, in mlx5_devx_cmd_query_hca_attr()
826 attr->tunnel_stateless_geneve_rx = in mlx5_devx_cmd_query_hca_attr()
829 attr->geneve_max_opt_len = in mlx5_devx_cmd_query_hca_attr()
832 attr->wqe_inline_mode = MLX5_GET(per_protocol_networking_offload_caps, in mlx5_devx_cmd_query_hca_attr()
834 attr->tunnel_stateless_gtp = MLX5_GET in mlx5_devx_cmd_query_hca_attr()
837 if (attr->wqe_inline_mode != MLX5_CAP_INLINE_MODE_VPORT_CONTEXT) in mlx5_devx_cmd_query_hca_attr()
839 if (attr->eth_virt) { in mlx5_devx_cmd_query_hca_attr()
840 rc = mlx5_devx_cmd_query_nic_vport_context(ctx, 0, attr); in mlx5_devx_cmd_query_hca_attr()
842 attr->eth_virt = 0; in mlx5_devx_cmd_query_hca_attr()
1539 mlx5_devx_cmd_create_cq(void *ctx, struct mlx5_devx_cq_attr *attr) in mlx5_devx_cmd_create_cq() argument
1554 if (attr->db_umem_valid) { in mlx5_devx_cmd_create_cq()
1555 MLX5_SET(cqc, cqctx, dbr_umem_valid, attr->db_umem_valid); in mlx5_devx_cmd_create_cq()
1556 MLX5_SET(cqc, cqctx, dbr_umem_id, attr->db_umem_id); in mlx5_devx_cmd_create_cq()
1557 MLX5_SET64(cqc, cqctx, dbr_addr, attr->db_umem_offset); in mlx5_devx_cmd_create_cq()
1559 MLX5_SET64(cqc, cqctx, dbr_addr, attr->db_addr); in mlx5_devx_cmd_create_cq()
1561 MLX5_SET(cqc, cqctx, cqe_sz, attr->cqe_size); in mlx5_devx_cmd_create_cq()
1562 MLX5_SET(cqc, cqctx, cc, attr->use_first_only); in mlx5_devx_cmd_create_cq()
1563 MLX5_SET(cqc, cqctx, oi, attr->overrun_ignore); in mlx5_devx_cmd_create_cq()
1564 MLX5_SET(cqc, cqctx, log_cq_size, attr->log_cq_size); in mlx5_devx_cmd_create_cq()
1565 MLX5_SET(cqc, cqctx, log_page_size, attr->log_page_size - in mlx5_devx_cmd_create_cq()
1567 MLX5_SET(cqc, cqctx, c_eqn, attr->eqn); in mlx5_devx_cmd_create_cq()
1568 MLX5_SET(cqc, cqctx, uar_page, attr->uar_page_id); in mlx5_devx_cmd_create_cq()
1569 MLX5_SET(cqc, cqctx, cqe_comp_en, !!attr->cqe_comp_en); in mlx5_devx_cmd_create_cq()
1571 attr->mini_cqe_res_format); in mlx5_devx_cmd_create_cq()
1573 attr->mini_cqe_res_format_ext); in mlx5_devx_cmd_create_cq()
1574 MLX5_SET(cqc, cqctx, cqe_sz, attr->cqe_size); in mlx5_devx_cmd_create_cq()
1575 if (attr->q_umem_valid) { in mlx5_devx_cmd_create_cq()
1576 MLX5_SET(create_cq_in, in, cq_umem_valid, attr->q_umem_valid); in mlx5_devx_cmd_create_cq()
1577 MLX5_SET(create_cq_in, in, cq_umem_id, attr->q_umem_id); in mlx5_devx_cmd_create_cq()
1579 attr->q_umem_offset); in mlx5_devx_cmd_create_cq()
1606 struct mlx5_devx_virtq_attr *attr) in mlx5_devx_cmd_create_virtq() argument
1627 attr->hw_available_index); in mlx5_devx_cmd_create_virtq()
1628 MLX5_SET16(virtio_net_q, virtq, hw_used_index, attr->hw_used_index); in mlx5_devx_cmd_create_virtq()
1629 MLX5_SET16(virtio_net_q, virtq, tso_ipv4, attr->tso_ipv4); in mlx5_devx_cmd_create_virtq()
1630 MLX5_SET16(virtio_net_q, virtq, tso_ipv6, attr->tso_ipv6); in mlx5_devx_cmd_create_virtq()
1631 MLX5_SET16(virtio_net_q, virtq, tx_csum, attr->tx_csum); in mlx5_devx_cmd_create_virtq()
1632 MLX5_SET16(virtio_net_q, virtq, rx_csum, attr->rx_csum); in mlx5_devx_cmd_create_virtq()
1634 attr->virtio_version_1_0); in mlx5_devx_cmd_create_virtq()
1635 MLX5_SET16(virtio_q, virtctx, event_mode, attr->event_mode); in mlx5_devx_cmd_create_virtq()
1636 MLX5_SET(virtio_q, virtctx, event_qpn_or_msix, attr->qp_id); in mlx5_devx_cmd_create_virtq()
1637 MLX5_SET64(virtio_q, virtctx, desc_addr, attr->desc_addr); in mlx5_devx_cmd_create_virtq()
1638 MLX5_SET64(virtio_q, virtctx, used_addr, attr->used_addr); in mlx5_devx_cmd_create_virtq()
1639 MLX5_SET64(virtio_q, virtctx, available_addr, attr->available_addr); in mlx5_devx_cmd_create_virtq()
1640 MLX5_SET16(virtio_q, virtctx, queue_index, attr->queue_index); in mlx5_devx_cmd_create_virtq()
1641 MLX5_SET16(virtio_q, virtctx, queue_size, attr->q_size); in mlx5_devx_cmd_create_virtq()
1642 MLX5_SET(virtio_q, virtctx, virtio_q_mkey, attr->mkey); in mlx5_devx_cmd_create_virtq()
1643 MLX5_SET(virtio_q, virtctx, umem_1_id, attr->umems[0].id); in mlx5_devx_cmd_create_virtq()
1644 MLX5_SET(virtio_q, virtctx, umem_1_size, attr->umems[0].size); in mlx5_devx_cmd_create_virtq()
1645 MLX5_SET64(virtio_q, virtctx, umem_1_offset, attr->umems[0].offset); in mlx5_devx_cmd_create_virtq()
1646 MLX5_SET(virtio_q, virtctx, umem_2_id, attr->umems[1].id); in mlx5_devx_cmd_create_virtq()
1647 MLX5_SET(virtio_q, virtctx, umem_2_size, attr->umems[1].size); in mlx5_devx_cmd_create_virtq()
1648 MLX5_SET64(virtio_q, virtctx, umem_2_offset, attr->umems[1].offset); in mlx5_devx_cmd_create_virtq()
1649 MLX5_SET(virtio_q, virtctx, umem_3_id, attr->umems[2].id); in mlx5_devx_cmd_create_virtq()
1650 MLX5_SET(virtio_q, virtctx, umem_3_size, attr->umems[2].size); in mlx5_devx_cmd_create_virtq()
1651 MLX5_SET64(virtio_q, virtctx, umem_3_offset, attr->umems[2].offset); in mlx5_devx_cmd_create_virtq()
1652 MLX5_SET(virtio_q, virtctx, counter_set_id, attr->counters_obj_id); in mlx5_devx_cmd_create_virtq()
1653 MLX5_SET(virtio_q, virtctx, pd, attr->pd); in mlx5_devx_cmd_create_virtq()
1654 MLX5_SET(virtio_net_q, virtq, tisn_or_qpn, attr->tis_id); in mlx5_devx_cmd_create_virtq()
1680 struct mlx5_devx_virtq_attr *attr) in mlx5_devx_cmd_modify_virtq() argument
1694 MLX5_SET64(virtio_net_q, virtq, modify_field_select, attr->type); in mlx5_devx_cmd_modify_virtq()
1695 MLX5_SET16(virtio_q, virtctx, queue_index, attr->queue_index); in mlx5_devx_cmd_modify_virtq()
1696 switch (attr->type) { in mlx5_devx_cmd_modify_virtq()
1698 MLX5_SET16(virtio_net_q, virtq, state, attr->state); in mlx5_devx_cmd_modify_virtq()
1702 attr->dirty_bitmap_mkey); in mlx5_devx_cmd_modify_virtq()
1704 attr->dirty_bitmap_addr); in mlx5_devx_cmd_modify_virtq()
1706 attr->dirty_bitmap_size); in mlx5_devx_cmd_modify_virtq()
1710 attr->dirty_bitmap_dump_enable); in mlx5_devx_cmd_modify_virtq()
1739 struct mlx5_devx_virtq_attr *attr) in mlx5_devx_cmd_query_virtq() argument
1759 attr->hw_available_index = MLX5_GET16(virtio_net_q, virtq, in mlx5_devx_cmd_query_virtq()
1761 attr->hw_used_index = MLX5_GET16(virtio_net_q, virtq, hw_used_index); in mlx5_devx_cmd_query_virtq()
1762 attr->state = MLX5_GET16(virtio_net_q, virtq, state); in mlx5_devx_cmd_query_virtq()
1763 attr->error_type = MLX5_GET16(virtio_net_q, virtq, in mlx5_devx_cmd_query_virtq()
1781 struct mlx5_devx_qp_attr *attr) in mlx5_devx_cmd_create_qp() argument
1797 MLX5_SET(qpc, qpc, pd, attr->pd); in mlx5_devx_cmd_create_qp()
1798 if (attr->uar_index) { in mlx5_devx_cmd_create_qp()
1800 MLX5_SET(qpc, qpc, uar_page, attr->uar_index); in mlx5_devx_cmd_create_qp()
1801 MLX5_SET(qpc, qpc, log_page_size, attr->log_page_size - in mlx5_devx_cmd_create_qp()
1803 if (attr->sq_size) { in mlx5_devx_cmd_create_qp()
1804 MLX5_ASSERT(RTE_IS_POWER_OF_2(attr->sq_size)); in mlx5_devx_cmd_create_qp()
1805 MLX5_SET(qpc, qpc, cqn_snd, attr->cqn); in mlx5_devx_cmd_create_qp()
1807 rte_log2_u32(attr->sq_size)); in mlx5_devx_cmd_create_qp()
1811 if (attr->rq_size) { in mlx5_devx_cmd_create_qp()
1812 MLX5_ASSERT(RTE_IS_POWER_OF_2(attr->rq_size)); in mlx5_devx_cmd_create_qp()
1813 MLX5_SET(qpc, qpc, cqn_rcv, attr->cqn); in mlx5_devx_cmd_create_qp()
1814 MLX5_SET(qpc, qpc, log_rq_stride, attr->log_rq_stride - in mlx5_devx_cmd_create_qp()
1817 rte_log2_u32(attr->rq_size)); in mlx5_devx_cmd_create_qp()
1822 if (attr->dbr_umem_valid) { in mlx5_devx_cmd_create_qp()
1824 attr->dbr_umem_valid); in mlx5_devx_cmd_create_qp()
1825 MLX5_SET(qpc, qpc, dbr_umem_id, attr->dbr_umem_id); in mlx5_devx_cmd_create_qp()
1827 MLX5_SET64(qpc, qpc, dbr_addr, attr->dbr_address); in mlx5_devx_cmd_create_qp()
1829 attr->wq_umem_offset); in mlx5_devx_cmd_create_qp()
1830 MLX5_SET(create_qp_in, in, wq_umem_id, attr->wq_umem_id); in mlx5_devx_cmd_create_qp()
1967 struct mlx5_devx_virtio_q_couners_attr *attr) in mlx5_devx_cmd_query_virtio_q_counters() argument
1988 attr->received_desc = MLX5_GET64(virtio_q_counters, virtio_q_counters, in mlx5_devx_cmd_query_virtio_q_counters()
1990 attr->completed_desc = MLX5_GET64(virtio_q_counters, virtio_q_counters, in mlx5_devx_cmd_query_virtio_q_counters()
1992 attr->error_cqes = MLX5_GET(virtio_q_counters, virtio_q_counters, in mlx5_devx_cmd_query_virtio_q_counters()
1994 attr->bad_desc_errors = MLX5_GET(virtio_q_counters, virtio_q_counters, in mlx5_devx_cmd_query_virtio_q_counters()
1996 attr->exceed_max_chain = MLX5_GET(virtio_q_counters, virtio_q_counters, in mlx5_devx_cmd_query_virtio_q_counters()
1998 attr->invalid_buffer = MLX5_GET(virtio_q_counters, virtio_q_counters, in mlx5_devx_cmd_query_virtio_q_counters()