Lines Matching refs:timdev_teardown
378 timdev_teardown(void) in timdev_teardown() function
1783 TEST_CASE_ST(timdev_setup_usec, timdev_teardown,
1785 TEST_CASE_ST(timdev_setup_usec, timdev_teardown,
1787 TEST_CASE_ST(timdev_setup_usec, timdev_teardown,
1789 TEST_CASE_ST(timdev_setup_sec, timdev_teardown,
1791 TEST_CASE_ST(timdev_setup_sec, timdev_teardown,
1793 TEST_CASE_ST(timdev_setup_usec_multicore, timdev_teardown,
1795 TEST_CASE_ST(timdev_setup_usec_multicore, timdev_teardown,
1797 TEST_CASE_ST(timdev_setup_sec_multicore, timdev_teardown,
1799 TEST_CASE_ST(timdev_setup_sec_multicore, timdev_teardown,
1803 TEST_CASE_ST(timdev_setup_msec, timdev_teardown,
1805 TEST_CASE_ST(timdev_setup_msec, timdev_teardown,
1807 TEST_CASE_ST(NULL, timdev_teardown,
1811 TEST_CASE_ST(timdev_setup_msec, timdev_teardown,
1813 TEST_CASE_ST(timdev_setup_msec, timdev_teardown,
1815 TEST_CASE_ST(timdev_setup_msec, timdev_teardown,
1817 TEST_CASE_ST(timdev_setup_msec, timdev_teardown,
1819 TEST_CASE_ST(timdev_setup_msec, timdev_teardown,
1821 TEST_CASE_ST(timdev_setup_msec, timdev_teardown,
1823 TEST_CASE_ST(timdev_setup_msec, timdev_teardown,
1825 TEST_CASE_ST(timdev_setup_msec, timdev_teardown,
1827 TEST_CASE_ST(timdev_setup_msec, timdev_teardown,
1829 TEST_CASE_ST(timdev_setup_msec, timdev_teardown,
1831 TEST_CASE_ST(timdev_setup_msec, timdev_teardown,